Indirect Specification - Mitsubishi Electric MELSEC iQ-R-R00CPU User Manual

21.20

Indirect Specification

Specify the device using the indirect address of device. Store the indirect address of device to be specified into the device for
indirect specification, and write as "@ + Device for indirect specification".
SM402
ADRSET
M0
MOV @D100
Besides, specifying a bit of a word device allows the indirect specification for the instruction that specifies bits.
SM402
ADRSET D0
M0
The indirect specification can be used in the device/label memory or refresh memory.
Indirect address of device
To specify, use the 32-bit data, and to hold the value, use the device of two words. The indirect address of the device can be
obtained with the ADRSET instruction. The ADRSET instruction specifies the indirect address of the device using instructions
that handle 32-bit data. For the ADRSET instruction, refer to the following.
 MELSEC iQ-R Programming Manual (CPU Module Instructions, Standard Functions/Function Blocks)
When the block or the file of the file register is switched through the RSET or QDRSET instruction, the indirect
address refers to the one of the block or the file before they are switched. To allow the indirect address in the
device for indirect specification to specify the block or file after the file register is switched, specify the
ADRSET instruction to obtain the indirect address again after block or file are switched.
Devices that can allow indirect specification
This section lists devices that can allow indirect specification.
Type
Devices that can allow indirect specification where @ is added
Device that can acquire the indirect address through the ADRSET
*2
instruction
*1 Also can be used for the local device. (e.g.: @#D0)
*2 The indirect address of device can be obtained for the local device as well. (e.g.: ADRSET #D0 D100)
*3 Devices that cannot be used as operands of instructions cannot be used even when they are indirectly specified.
Device for the
indirect specification
(D100, D101)
D0 D100
D1
Indirect
specification
Device for the indirect
specification
(D100, D101)
D100
@D100.0
Bit specification of
the device specified
indirectly
*1
Indirect
address Device memory
1000H
D0
(1) (2)
D100
1000H
D101
Indirect
Device
address
memory
D0.0
1000H
D0
(1)
(2)
D100
1000H
D101
*3
Device
T, ST, C, D, W, SW, FD, SD, Un\G, Jn\W, Jn\SW, U3En\G, U3En\HG, R, ZR,
RD
X, Y, M, L, B, F, SB, T, ST, C, D, W, SW, FX, FY, FD, SM, SD, R, ZR, RD
(1) The indirect address of D0 is read
into D100, D101.
(2) The indirect address is used to
indirectly specify D0.
(1) The indirect address of D0 is read
into D100, D101.
(2) The indirect address is used to
output at the 0th bit of D0 which
was indirectly specified using the
indirect address.
21 DEVICES
21.20 Indirect Specification
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