Mitsubishi Electric MELSEC iQ-R-R00CPU User Manual page 75

Melsec iq-r series cpu module application user's manual
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• For I44
If the running interrupt program finishes before the next cycle, the I44 interrupt program will be executed when the running
interrupt program finishes. If the running interrupt program continues beyond the start of the next cycle (the second cycle), the
memorized information will be discarded (even when the running interrupt program finishes, the I44 interrupt program will not
be executed). Also, if the I44 interrupt program for this cause cannot be executed, SM480 (Cycle overrun flag for inter-module
synchronization program (I44)) is turned on, and SD480 (Number of cycle overrun events for inter-module synchronization
cycle program (I44)) reaches its upper limit.
Main routine program
High
I49 interrupt program
I45 interrupt program
I44 interrupt program
Low
Priority level of interrupt:
I45 = I44
Sc: Inter-module synchronization cycle
(1) The interrupt factor is memorized.
(2) Because an interrupt does not occur, the memorized information is discarded in the second cycle.
(3) After I49 that has a higher priority level is completed, I44 is executed.
(4) After I45 that has the same priority level and a higher priority order is completed, the interrupt is executed.
(5) I44 is not executed because the termination of I49 or I45 is in the second cycle for I44.
(6) The interrupt is executed because I49 and I45 have been completed.
I49
I45
(1)
I44
I44
Sc
Sc
(3)
(4)
I49
(1)
(1)
I44
I44
Sc
Sc
(2)
I44
Sc
(6)
(5)
t
1 RUNNING A PROGRAM
1.7 Interrupt Program
1
73

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