Mitsubishi Electric MELSEC iQ-R-R00CPU User Manual page 72

• For I44
If interrupt is enabled before the next cycle, the I44 interrupt program will be executed when the interrupt is enabled. If
interrupt continues to be disabled beyond the start of the next cycle (the second cycle), the memorized information will be
discarded (even when the interrupt is enabled, the I44 interrupt program will not be executed). Also, if the I44 interrupt
program for this cause cannot be executed, SM480 (Cycle overrun flag for inter-module synchronization program (I44)) is
turned on, and SD480 (Number of cycle overrun events for inter-module synchronization cycle program (I44)) reaches its
upper limit. If the IMASK instruction and SIMASK instruction are used to disable the interrupt, all the memorized factors will be
discarded.
Main routine program
I44 interrupt program
Sc: Inter-module synchronization cycle
(1) The interrupt factor is memorized.
(2) Because an interrupt does not occur, the memorized information is discarded in the second cycle.
(3) The interrupt is executed when interrupts are enabled.
(4) I44 is not executed because interrupts continue to be disabled beyond the second cycle of I44.
(5) The interrupt is executed because interrupts are enabled.
1 RUNNING A PROGRAM
70
1.7 Interrupt Program
(1)
I44
Sc Sc
Interrupts are
disabled (DI).
(3)
(1) (2)
I44 I44
Sc Sc
Interrupts are
disabled (DI).
(4)
I44
(5)
t