ABB REL650 series Technical Manual page 26

Table of contents
20
Fault current reversal logic......................................................... 525
Weak-end infeed logic................................................................ 526
Technical data................................................................................. 527
Section 13 Logic..................................................................................529
Tripping logic common 3-phase output SMPPTRC (94).......................529
Identification.................................................................................... 529
Functionality.................................................................................... 529
Function block................................................................................. 529
Signals.............................................................................................530
Settings............................................................................................530
Operation principle.......................................................................... 530
Technical data................................................................................. 531
Tripping logic phase segregated output SPTPTRC 94.........................532
Identification.................................................................................... 532
Functionality.................................................................................... 532
Function block................................................................................. 532
Signals.............................................................................................533
Settings............................................................................................533
Operation principle.......................................................................... 534
Technical data................................................................................. 537
Trip matrix logic TMAGGIO.................................................................. 537
Identification.................................................................................... 537
Functionality.................................................................................... 537
Function block................................................................................. 538
Signals.............................................................................................538
Settings............................................................................................540
Operation principle.......................................................................... 540
Configurable logic blocks......................................................................541
Standard configurable logic blocks..................................................541
Functionality............................................................................... 541
OR function block....................................................................... 544
Inverter function block INVERTER............................................. 545
PULSETIMER function block .....................................................546
Controllable gate function block GATE.......................................547
Exclusive OR function block XOR.............................................. 548
Loop delay function block LOOPDELAY.................................... 549
Timer function block TIMERSET................................................ 549
AND function block .................................................................... 551
Set-reset memory function block SRMEMORY..........................552
Technical manual