Timer Prescaler Register - Motorola DragonBall MC68328 User Manual

Integrated processor
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FRR Free Run/Restart
This bit controls the timer operation after a "reference" event occurs. In the free-run mode,
the timer continues running. In the restart mode, the counter is reset to $0000, then re-
sumes counting.
0 = Restart mode
1 = Free-run mode
CLKSOURCE
These bits control the clock source to the timer. Stop-count freezes the timer without causing
the value in the counter to be reset to $0000.
000= Stop count (clock disabled)
001= System clock to timer
010= System clock divided by 16
011= TIN pin is the clock source
1xx = 32kHz clock
TEN Timer Enable
This bit enables the timer module.
0 = Timer disabled
1 = Timer enabled
When this bit transitions from 0 to 1, the counter is reset to
$0000. The other registers are not disturbed.
6.4.1.3 TIMER PRESCALER REGISTER. These identical registers control the overall indi-
vidual timer operation.
15
14
13
12
Timer 1 Address: (FF)FFF602
Timer 2 Address: (FF)FFF60E
PRESCALER
These bits determine the divide value of the prescaler between 1 and 256. $00 divides by 1
and $FF divides by 256.
6.4.1.4 TIMER-COMPARE REGISTER. Each "compare" register is a 16-bit register that
contains the value that is compared with the free-running counter as part of the output-
compare function. This is a memory-mapped read-write register.
MOTOROLA
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
11
10
9
UNUSED
Figure 6-5. Timer Prescaler Registers
NOTE
8
7
6
5
4
3
2
1
Prescaler
Reset Value: $0000
Timer
0
6-5

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