Reference Clock; Figure 4-31: Reference Clock Oscillator Interface Up To 400 Mhz; Figure 4-32: Reference Clock Oscillator Interface Above 400 Mhz - Xilinx RocketIO X User Manual

R
transmitting or receiving. Therefore, when a transceiver is not to be used for an extended
period of time, the POWERDOWN port should be asserted High to reduce overall power
consumption by the Virtex-II Pro X FPGA. Deasserting the POWERDOWN port restores
the transceiver to normal functional status.

Reference Clock

A high degree of accuracy is required from the reference clock. For this reason, it is
required that an EPSON EG2121CA 2.5V oscillator be used. (Visit the
America website
specified by the manufacturer must be used, and the circuit in
interface the LVPECL outputs of the oscillator with the inputs of the transceiver reference
clock.
The EG2121CA can be used for frequencies up to 400 MHz. For applications beyond this
frequency (e.g., 622.08 MHz, 644.53125 MHz), the EG2121CA has to be replaced with
EV-2101CA, which is a Voltage Controlled Saw Oscillator (VCSO). Note that the VCSO
requires a control voltage in addition to the supply voltage. Also note that the supply
voltage is 3.3V and not 2.5V (as in the EG2121CA). See
122
for detailed information about this device.) The power supply circuit
EG2121CA
2.5V-PECL
100Ω

Figure 4-31: Reference Clock Oscillator Interface up to 400 MHz

EV-2101CA
3.3V-PECL
VCSO
100Ω

Figure 4-32: Reference Clock Oscillator Interface above 400 MHz

www.xilinx.com
1-800-255-7778
Chapter 4: Analog Design Considerations
Figure 4-31
.1 µF
(100 nF)
Z
0
100Ω
Z
0
.1 µF
100Ω
(100 nF)
ug035_ch4_25_051904
Figure 4-32.
.1 µF
(100 nF)
Z
0
100Ω
Z
0
.1 µF
100Ω
(100 nF)
ug035_ch4_26_111704
RocketIO™ X Transceiver User Guide
UG035 (v1.5) November 22, 2004
Epson Electronics
must be used to