Figure C-2: Fine Loop Charge Pump; Table C-46: Tail Current Value Vs. Programmability Code - Xilinx RocketIO X User Manual

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Data-Density Independent Phase Adjustment for CDR
Data-density independent sampling point control is achieved by forcing the fine loop CP
to source/sink charge on the loop filter, only when there is a transition in the data under
locking conditions, i.e., when the loop is locked. This can be done by making the tail
currents of TRAN_CP and DC_CP currents programmable in a complementary fashion.
Each tail current is made programmable by a 4-bit bus according to

Table C-46: Tail Current Value Vs. Programmability Code

Where I
evaluated
The default code for DC_CP current is 0 and for the Tran_CP code is 0. This will set the two
currents to their nominal values. DC_CP bus is accessed through SEL_DAC_FIX [3:0]
RocketIO™ X Transceiver User Guide
UG035 (v1.5) November 22, 2004
2I
2I
PHb
2I
Phase CP (PCP)

Figure C-2: Fine Loop Charge Pump

Code
Tail Current
0
I
*(1 + 0 * 0.125)
n
1
I
*(1 + 1 * 0.125)
n
2
I
*(1 + 2 * 0.125)
n
3
I
*(1 + 3 * 0.125)
n
4
I
*(1 + 4 * 0.125)
n
5
I
*(1 + 5 * 0.125)
n
6
I
*(1 + 6 * 0.125)
n
7
I
*(1 + 7 * 0.125)
n
is the nominal value of the tail current of DC_CP or Tran_CP, and the code is
n
in
decimal.
www.xilinx.com
1-800-255-7778
Charge Pump
PH
TR
I
SEL_DAC_Fix<[3 :: 0 ]
SEL_DAC_Tran<[3 :0]
Transition CP (TCP)
FIX Current
Code
8
9
10
11
12
13
14
15
IOUTN
IOUTP
TRb
I
ug035_appC_02_111904
Table
C-46.
Tail Current
I
*(1 - 8 * 0.125)
n
I
*(1 - 7 * 0.125)
n
I
*(1 - 6 * 0.125)
n
I
*(1 - 5 * 0.125)
n
I
*(1 - 4 * 0.125)
n
I
*(1 - 3 * 0.125)
n
I
*(1 - 2 * 0.125)
n
I
*(1 - 1 * 0.125)
n
R
165

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