Xilinx RocketIO X User Manual page 135

Timing Diagram and Timing Parameter Tables
Table A-3: Parameters Relative to RX User Clock2 (RXUSRCLK2) (Continued)
Parameter
Clock:
T
RX2PWH
T
RX2PWL
Table A-4: Parameters Relative to TX User Clock2 (TXUSRCLK2)
Parameter
Setup/Hold:
T _TBYP/T _TBYP
GCCK GCKC
T _TPOL/T _TPOL
GCCK GCKC
T _TINH/T _TINH
GCCK GCKC
T _LBK/T _LBK
GCCK GCKC
T _TRST/T _TRST
GCCK GCKC
T _TKCH/T _TKCH
GCCK GCKC
T _TCDM/T _TCDM
GCCK GCKC
T _TCDV/T _TCDV
GCCK GCKC
T _TDATW/T
GCCK GCCK
T _TENC/T _TENC
GCCK GCCK
T _TIDATW/T
GCCK GCCK
T _TXGEAR/T
GCCK GCCK
T _TXSCBL/T
GCCK GCCK
T _RFCKSL/T
GCCK GCCK
T _TDAT/T _TDAT
GDCK GCKD
Clock to Out:
T _TBERR
GCKST
T _TKERR
GCKST
T _TRDIS
GCKDO
Clock:
T
TX2PWH
T
TX2PWL
RocketIO™ X Transceiver User Guide
UG035 (v1.5) November 22, 2004
Clock pulse width, High
state
Clock pulse width, Low
state
Control inputs
Control inputs
Control inputs
Control inputs
Control inputs
Control inputs
Control inputs
Control inputs
_TDATW Control inputs
Control inputs
_TIDATW Control inputs
_TXGEAR Control inputs
_TXSCBL Control inputs
_RFCKSL Control inputs
Data inputs
Status outputs
Status outputs
Data outputs
Clock pulse width, High state TXUSRCLK2
Clock pulse width, Low state
1-800-255-7778
Function
RXUSRCLK2
RXUSRCLK2
Function
TXBYPASS8B10B[7:0]
TXPOLARITY
TXINHIBIT
LOOPBACK[1:0]
TXRESET
TXCHARISK[7:0]
TXCHARDISPMODE[7:0]
TXCHARDISPVAL[7:0]
TXDATAWIDTH[1:0]
TXENC64B66BUSE TXENC8B10BUSE
TXINTDATAWIDTH[1:0]
TXGEARBOX64B66BUSE
TXSCRAM64B66BUSE
REFCLKSEL REFCLKBSEL
TXDATA[63:0]
TXBUFERR
TXKERR[7:0]
TXRUNDDISP[7:0]
TXUSRCLK2
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Signals
Signals
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