Reference Clock; Epson Eg-2121Ca 2.5V (Lvpecl Outputs); Pletronics Lv1145B (Lvds Outputs) - Xilinx RocketIO User Manual

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PCB Design Requirements

Reference Clock

A high degree of accuracy is required from the reference clock. For this reason, it is
required that one of the oscillators listed in this section be used:

Epson EG-2121CA 2.5V (LVPECL Outputs)

See the
circuit specified by the manufacturer must be used.
The circuit shown in
to the LVDS or LVPECL inputs of the transceiver reference clock. Alternatively, the
LVDS_25_DT input buffers can be used to terminate the signals on-chip, as shown in
Figure

Pletronics LV1145B (LVDS Outputs)

See the
The circuit shown in
the LVDS inputs of the transceiver reference clock. Alternatively, the LVDS_25_DT input
buffer may be used to terminate the signals on-chip, as shown in
RocketIO™ Transceiver User Guide
UG024 (v3.0) February 22, 2007
Epson Electronics America website
Figure 3-17
3-18.
EG2121CA
2.5V-PECL
Figure 3-17: LVPECL Reference Clock Oscillator Interface
EG2121CA
2.5V-PECL
Figure 3-18: LVPECL Reference Clock Oscillator Interface (On-Chip Termination)
Pletronics website for detailed information.
Figure 3-19
LV1145B
2.5V-LVDS
Figure 3-19: LVDS Reference Clock Oscillator Interface
LV1145B
2.5V-LVDS
Figure 3-20: LVDS Reference Clock Oscillator Interface (On-Chip Termination)
www.xilinx.com
for detailed information. The power supply
must be used to interface the oscillator's LVPECL outputs
Z
0
100Ω
100Ω
Z
0
100Ω
Z
0
100Ω
Z
0
100Ω
must be used to interface the oscillator's LVDS outputs to
Z
0
LVDS
100Ω
Z
0
UG024_025b_050102
Z
0
LVDS_25_DT
100Ω
Z
0
UG024_025d_071504
LVDS or
LVPECL
UG024_025a_110603
100Ω
LVDS_25
_DT
UG024_025c_071504
Figure 3-20.
R
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