Reference Clock; Epson Eg-2121Ca 2.5V (Lvpecl Outputs); Pletronics Lv1145B (Lvds Outputs) - Xilinx RocketIO User Manual

R

Reference Clock

A high degree of accuracy is required from the reference clock. For this reason, it is required that
one of the oscillators listed in this section be used:

Epson EG-2121CA 2.5V (LVPECL Outputs)

See the
specified by the manufacturer must be used.
The circuit shown in
LVDS or LVPECL inputs of the transceiver reference clock. Alternatively, the LVDS_25_DCI input
buffers may be used to terminate the signals on-chip, as shown in

Pletronics LV1145B (LVDS Outputs)

See the
The circuit shown in
LVDS inputs of the transceiver reference clock. Alternatively, the LVDS_25_DCI input buffer may
be used to terminate the signals on-chip, as shown in
116
Epson Electronics America website
Figure 3-17
EG2121CA
2.5V-PECL
Figure 3-17: LVPECL Reference Clock Oscillator Interface
EG2121CA
2.5V-PECL
Figure 3-18: LVPECL Reference Clock Oscillator Interface (On-Chip Termination)
Pletronics website for detailed information.
Figure 3-19
LV1145B
2.5V-LVDS
Figure 3-19: LVDS Reference Clock Oscillator Interface
LV1145B
2.5V-LVDS
Figure 3-20: LVDS Reference Clock Oscillator Interface (On-Chip Termination)
www.xilinx.com
1-800-255-7778
Chapter 3: Analog Design Considerations
for detailed information. The power supply circuit
must be used to interface the oscillator's LVPECL outputs to the
Z
0
100Ω
100Ω
Z
0
100Ω
Z
0
100Ω
Z
0
100Ω
must be used to interface the oscillator's LVDS outputs to the
Figure 3-20.
Z
0
100Ω
Z
0
Z
0
Z
0
Figure 3-18.
LVDS or
LVPECL
UG024_025a_110603
100Ω
LVDS_25
_DCI
UG024_025c_112202
LVDS
UG024_025b_050102
LVDS_25_DCI
100Ω
UG024_025d_112202
RocketIO™ Transceiver User Guide
UG024 (v2.3.2) June 24, 2004