Xilinx RocketIO X User Manual page 4

Date Version
03/09/04 1.3
RocketIO™ X Transceiver User Guide
(Continued)
Chapter 4, "Analog Design
• Modified text (at end of section) and added "LT1963A" to
114.
• Replaced
Figure 4-23, page
• Modified first paragraph under
• Modified
Figure 4-31, page 122
• Deleted Figure 4-33.
•
Chapter 5, "Simulation and
• Modified
Table 5-3, page 127
• Modified section,
"Parallel Loopback," page
• Added new section,
"Post/Pre-Driver Serial Loopback," page
Appendix B, "8B/10B Valid Characters:
• Updated
Table B-1, page
D9.1, D9.2, D9.3, D9.4, D9.5, D9.6, and D9.7.
Appendix C, "PMA Attribute Programming Bus:
• Added table references in
register definitions.
• Modified
Table C-1, page
Appendix D, "Virtex-II Pro to Virtex-II Pro X FPGA Design Migration:
• Added note directly above
• Added new section,
"Migration Differences."
Added new "Index."
Revision
Considerations":
117.
"Routing Serial Traces," page
and Figure 4-32, page
Implementation":
(Loopback Modes).
128.
137. Changed entries in "Current RD+" column for Data Byte
"Register Definition"
147.
Figure D-2, page 171.
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"Voltage Regulation," page
117.
122.
128.
section and changed the order of the
UG035 (v1.5) November 22, 2004