Differential Trace Design; Figure 4-24: Single-Ended Trace Geometry - Xilinx RocketIO X User Manual

R
All signal traces must have an intact reference plane beneath them. Stripline and
microstrip geometries may be used. The reference plane should extend no less than five
trace widths to either side of the trace to ensure predictable transmission line behavior.
Routing of a differential pair is optimally done in a point-to-point fashion, ideally
remaining on the same PCB routing layer. As vias represent an impedance discontinuity,
layer-to-layer changes should be avoided wherever possible. It is acceptable to traverse the
PCB stackup to reach the transmitter and receiver package pins. If serial traces must
change layers, care must be taken to ensure an intact current return path. For this reason,
routing of high-speed serial traces should be on signal layers that share a reference plane.
If the signal layers do not share a reference plane, a capacitor of value 0.01 µF should be
connected across the two reference layers close to the vias where the signals change layers.
If both of the reference layers are DC coupled (if they are both ground), they can be
connected with vias close to where the signals change layers.
To control crosstalk, serial differential traces should be spaced at least five trace separation
widths from all other PCB routes, including other serial pairs. A larger spacing is required
if other PCB routes carry noisy signals, such as TTL and other similarly noisy standards.
The RocketIO X transceiver is designed to function up to 10.3125 Gb/s through 16 inches
of FR4 with two high-bandwidth connectors. Longer trace lengths require use of a low-loss
dielectric (for example, Rogers 4350 can essentially double the transmission distance
compared to FR4). Longer traces are also supported at lower data rates; for example, data
at both 3.125 and 6.25 Gb/s can be transmitted reliably over more than 46 inches of FR4
and two high-bandwidth connectors.

Differential Trace Design

The characteristic impedance of a pair of differential traces depends not only on the
individual trace dimensions, but also on the spacing between them. The RocketIO X
transceivers require a 100Ω differential trace impedance. To achieve this differential
impedance requirement, the characteristic impedance of each individual trace must be
slightly higher than half of the target differential impedance. A field solver should be used
to determine the exact trace geometry suited to the specific application
task should not be left up to the PCB vendor.
Differential impedance of traces on the finished PCB should be verified with Time Domain
Reflectometry (TDR) measurements.
Tight coupling of differential traces is recommended. Tightly coupled traces (as opposed to
loosely coupled) maintain a very close proximity to one another along their full length.
Since the differential impedance of tightly coupled traces depends heavily on their
proximity to each other, it is imperative that they maintain constant spacing along their full
length, without deviation. If it is necessary to separate the traces in order to route through
a pin field or other PCB obstacle, it can be helpful to modify the trace geometry in the
118
W
Trace
H
E = 4.3
r
Reference Plane

Figure 4-24: Single-Ended Trace Geometry

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Chapter 4: Analog Design Considerations
W = 7.9 mil (0.201 mm)
H = 5.0 mil (0.127 mm)
Z = 50Ω
0
Dielectric
ug035_ch4_19_022703
RocketIO™ X Transceiver User Guide
UG035 (v1.5) November 22, 2004
(Figure 4-24). This