Receive Equalization - Xilinx RocketIO X User Manual

Receive Equalization

When receive PLL lock is forced to the incoming data, the local reference clock is ignored.
The recovered clock is not guaranteed to be within any tolerance of the local reference and
might "wander" in the absence of data and/or transitions.
Receive Equalization
In addition to transmit emphasis, the RocketIO X transceiver provides a programmable
receive equalization feature to further compensate the effects of channel attenuation at
high frequencies.
Copper traces on printed circuit boards, including backplanes, have low-pass filter
characteristics which severely attenuate signals in the GHz and above range. Reflections at
the impedance mismatch boundaries can also cause signal degradation. The RocketIO X
transceiver has an equalizer in the receiver which can essentially null the lossy attenuation
effects of the PCB at GHz frequencies.
RXFER[9:0] is a 10-bit register that adjusts this receive equalization. By adjusting these bits,
the right amount of equalization can be added to reverse the signal degradation caused by
a PCB. Users are encouraged to calculate or measure the loss function/curve of their
channel and then try to fit an equalizer function which is inverse of the channel loss
function. The closer the fit, the better the effect is; in essence, it is possible to completely
nullify the PCB effects with the right bit settings.
RXFER[9:0] can be set through software configuration or the PMA Attribute Bus. Refer to
Appendix C, "PMA Attribute Programming Bus."
Other registers that control certain aspects of the receiver are also described in
C, "PMA Attribute Programming Bus."
important:
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•
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RocketIO™ X Transceiver User Guide
UG035 (v1.5) November 22, 2004
RXFEI[1:0] controls the receiver analog front end (AFE)/equalizer current
RXLOOPFILTERC[1:0] selects the receiver PLL filter capacitor setting
RXLOOPFILTERR[2:0] selects the receiver PLL filter resistor setting.
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Among them, the following registers are
R
Appendix
105