Key Input Interrupt - Epson S1C33210 Technical Manual

Key Input Interrupt

The key input interrupt circuit has two interrupt systems (FPK1 and FPK0) and a port group can be selected for
generating each interrupt factor.
The interrupt condition can also be set by software.
Figure 9.4 shows the configuration of the port input interrupt circuit.
FPK0 system
K50
K60
P00
P20
Input port selection
SPPK0
Input comparison
register SCPK0
Address
Input mask
register SMPK0
Address
K50, K60, P00, P20
K51, K61, P01, P21
K52, K62, P02, P22
CP4, K63, P03, P23
CP0, P04, P24
FPK1 system
K60
CP0
P04
P24
Input port selection
SPPK1
Input comparison
register SCPK1
Address
Input mask
register SMPK1
Address
K60, CP0, P04, P24
K61, CP1, P05, P25
K62, CP2, P06, P26
K63, CP3, P07, P27
S1C33210 FUNCTION PART
Figure 9.4 Configuration of Key Input Interrupt Circuit
EPSON
III PERIPHERAL BLOCK: INPUT/OUTPUT PORTS
Interrupt signal
generation
Interrupt signal
generation
FPK0
Interrupt
request
FPK1
Interrupt
request
B-III-9-13