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Register name
Address
Bit
Serial I/F Ch.1
00401E7
D7–6
status register
(B)
D5
D4
D3
D2
D1
D0
Serial I/F Ch.1
00401E8
D7
control register
(B)
D6
D5
D4
D3
D2
D1
D0
Serial I/F Ch.1
00401E9
D7–5
IrDA register
(B)
D4
D3
D2
D1
D0
Serial I/F Ch.2
00401F0
D7
transmit data
(B)
D6
register
D5
D4
D3
D2
D1
D0
Serial I/F Ch.2
00401F1
D7
receive data
(B)
D6
register
D5
D4
D3
D2
D1
D0
Serial I/F Ch.2
00401F2
D7–6
status register
(B)
D5
D4
D3
D2
D1
D0
Serial I/F Ch.2
00401F3
D7
control register
(B)
D6
D5
D4
D3
D2
D1
D0
Serial I/F Ch.2
00401F4
D7–5
IrDA register
(B)
D4
D3
D2
D1
D0
S1C33210 FUNCTION PART
Name
Function
–
–
TEND1
Ch.1 transmit-completion flag
FER1
Ch.1 flaming error flag
PER1
Ch.1 parity error flag
OER1
Ch.1 overrun error flag
TDBE1
Ch.1 transmit data buffer empty
RDBF1
Ch.1 receive data buffer full
TXEN1
Ch.1 transmit enable
RXEN1
Ch.1 receive enable
EPR1
Ch.1 parity enable
PMD1
Ch.1 parity mode selection
STPB1
Ch.1 stop bit selection
SSCK1
Ch.1 input clock selection
SMD11
Ch.1 transfer mode selection
SMD10
–
–
DIVMD1
Ch.1 async. clock division ratio
IRTL1
Ch.1 IrDA I/F output logic inversion
IRRL1
Ch.1 IrDA I/F input logic inversion
IRMD11
Ch.1 interface mode selection
IRMD10
TXD27
Serial I/F Ch.2 transmit data
TXD26
TXD27(26) = MSB
TXD25
TXD20 = LSB
TXD24
TXD23
TXD22
TXD21
TXD20
RXD27
Serial I/F Ch.2 receive data
RXD26
RXD27(26) = MSB
RXD25
RXD20 = LSB
RXD24
RXD23
RXD22
RXD21
RXD20
–
reserved
TEND2
Ch.2 transmit-completion flag
FER2
Ch.2 flaming error flag
PER2
Ch.2 parity error flag
OER2
Ch.2 overrun error flag
TDBE2
Ch.2 transmit data buffer empty
RDBF2
Ch.2 receive data buffer full
TXEN2
Ch.2 transmit enable
RXEN2
Ch.2 receive enable
EPR2
Ch.2 parity enable
PMD2
Ch.2 parity mode selection
STPB2
Ch.2 stop bit selection
SSCK2
Ch.2 input clock selection
SMD21
Ch.2 transfer mode selection
SMD20
–
reserved
DIVMD2
Ch.2 async. clock division ratio
IRTL2
Ch.2 IrDA I/F output logic inversion
IRRL2
Ch.2 IrDA I/F input logic inversion
IRMD21
Ch.2 interface mode selection
IRMD20
III PERIPHERAL BLOCK: SERIAL INTERFACE
Setting
–
1 Transmitting 0 End
1 Error
0 Normal
1 Error
0 Normal
1 Error
0 Normal
1 Empty
0 Buffer full
1 Buffer full
0 Empty
1 Enabled
0 Disabled
1 Enabled
0 Disabled
1 With parity
0 No parity
1 Odd
0 Even
1 2 bits
0 1 bit
1 –
0 Internal clock
SMD1[1:0]
Transfer mode
1
1
8-bit asynchronous
1
0
7-bit asynchronous
–
1 1/8
0 1/16
1 Inverted
0 Direct
1 Inverted
0 Direct
IRMD1[1:0]
I/F mode
1
1
reserved
1
0
IrDA 1.0
0
1
reserved
0
0
General I/F
0x0 to 0xFF(0x7F)
0x0 to 0xFF(0x7F)
–
1 Transmitting 0 End
1 Error
0 Normal
1 Error
0 Normal
1 Error
0 Normal
1 Empty
0 Buffer full
1 Buffer full
0 Empty
1 Enabled
0 Disabled
1 Enabled
0 Disabled
1 With parity
0 No parity
1 Odd
0 Even
1 2 bits
0 1 bit
1 #SCLK2
0 Internal clock
SMD2[1:0]
Transfer mode
1
1
8-bit asynchronous
1
0
7-bit asynchronous
0
1
Clock sync. Slave
0
0
Clock sync. Master
–
1 1/8
0 1/16
1 Inverted
0 Direct
1 Inverted
0 Direct
IRMD2[1:0]
I/F mode
1
1
reserved
1
0
IrDA 1.0
0
1
reserved
0
0
General I/F
EPSON
Init. R/W
Remarks
–
–
0 when being read.
0
R
0
R/W
Reset by writing 0.
0
R/W
Reset by writing 0.
0
R/W
Reset by writing 0.
1
R
0
R
0
R/W
0
R/W
X
R/W
X
R/W
X
R/W
X
R/W
Always set to 0
X
R/W
Always set SMD11 to
X
1
–
–
0 when being read.
X
R/W
X
R/W
X
R/W
X
R/W
X
X
R/W
X
X
X
X
X
X
X
X
R
X
X
X
X
X
X
X
–
–
0 when being read.
0
R
0
R/W
Reset by writing 0.
0
R/W
Reset by writing 0.
0
R/W
Reset by writing 0.
1
R
0
R
0
R/W
0
R/W
X
R/W
Valid only in
X
R/W
asynchronous mode.
X
R/W
X
R/W
X
R/W
X
–
–
0 when being read.
X
R/W
X
R/W
Valid only in
X
R/W
asynchronous mode.
X
R/W
X
B-III-8-29
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