Epson S1C33210 Technical Manual page 391

Cmos 32-bit single chip microcomputer
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Communications Mode
Next configure the mobile access interface pins with the MSEL pin input level and communications macro
select (MCRS) register (D[1:0]/0x200000). (See Table 10.4.)
The default MCRS setting, after an initial reset, is 00, which specifies UART or serial IF Ch. 3.
MSEL Input
Level
High
High
High
High
Low
PHS Signal Format
Next use the BMODE, BHALF, and FMODE bits in the communications block PHS mode settings register
(D[2:0]/0x0200010) to configure the PHS signal format to match the target PHS device. Table 10.5 and Figure
10.2 through Figure 10.6 summarize the signal formats available.
Use only the combinations given.
The default setting, after an initial reset, BMODE, BHALF and FMODE are set to 000.
These settings are ignored by all communications modes other than PHS.
BMODE
BHALF FMODE
0
0
1
0
1
1
PIAFS frame period
Frame signal period
DCD (frame signal)
CTS (bit clock, 32 kHz)
TXD and RXD (data signals)
S1C33210 FUNCTION PART
III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACES
Table 10.4 Communications Mode
MCRS1 MCRS0 Communications
1
1
1
0
0
1
0
0
0
0
Table 10.5 PHS Signal Formats
Frame Signal
Frequency
0
200 Hz (5ms)
200 Hz (5ms)
1
8 kHz
8 kHz
1
8 kHz
5 ms
0
1
2
3
4
5
6
Figure 10.2 PHS Signal Format (1)
Target Mobile Device
Mode
PHS
communications
PDC
communications
HDLC
PDC device supporting
communications
UART
communications
Serial IF Ch. 3
Bit Clock Frequency
32 kHz
64 kHz
32 kHz
64 kHz
64 kHz
32 kbps: 20 ms
7
8
EPSON
PHS
PDC
packets
CdmaOne
Data Transfer
Figure
Rate
32 kbps
Figure 10.2
64 kbps
Figure 10.3
32 kbps
Figure 10.4
64 kbps
Figure 10.5
32 kbps
Figure 10.6
5 ms
5 ms
5 ms
(Total 640 bits)
B-III-10-5

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