Introduction - Epson S1C33210 Technical Manual

II-1 INTRODUCTION
The core block consists of a functional block C33_CORE including CPU, BCU (Bus Control Unit), ITC (Interrupt
Controller), CLG (Clock Generator) and DBG (Debug Unit), an I/O pad block for external interface, and an SBUS
(Internal Silicon Integration Bus) for interfacing with on-chip Peripheral Macro Cells.
C33 DMA Block
C33_DMA
(IDMA, HSDMA)
C33_ADC
(A/D converter)
C33 Analog Block
S1C33210 FUNCTION PART
Internal RAM
(Area 0)
C33_CORE
(CPU, BCU, ITC, CLG, DBG)
C33_SBUS
C33_PERI
(Prescaler, 8-bit timer, 16-bit timer,
Clock timer, Serial interface,
Mobile access interface, Ports)
Figure 1.1 Core Block
EPSON
II CORE BLOCK: INTRODUCTION
C33 Internal Memory Block
C33 Core Block
C33 Peripheral Block
Pads
Pads
B-II-1-1