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III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACES
ABRTIES: HDLC enable bit for Abort (D7) / HDLC interrupt enable settings register (0x0200304)
TXUEIES: HDLC enable bit for Tx underrun/EOM (D6) / HDLC interrupt enable settings register
(0x0200304)
HUNTIES HDLC enable bit for Hunt (D5) / HDLC interrupt enable settings register (0x0200304)
IDLDIES: HDLC enable bit for idle detect conditions (D4) / HDLC interrupt enable settings register
(0x0200304)
Writing "1" to a bit enables E/S INT interrupts for changes in the corresponding HDLC status bit. Writes of "0" are
ignored. Clearing a bit requires writing to the corresponding bit in the HDLC clear interrupt enable register.
Reading this register returns the current setting for these enable bits: disabled ("0") or enabled ("1").
Setting ABRTIES to "1" produces an E/S INT interrupt when the Abort bit changes in either direction.
Write "1": Interrupt enabled
Write "0": Invalid
Read "1": Interrupt enabled
Read "0": Interrupt disabled
Setting TXUEIES to "1" produces an E/S INT interrupt when the Tx underrun/EOM bit changes from "0" to "1."
Write "1": Interrupt enabled
Write "0": Invalid
Read "1": Interrupt enabled
Read "0": Interrupt disabled
Setting HUNTIES to "1" produces an E/S INT interrupt when the Hunt bit changes from "0" to "1."
Write "1": Interrupt enabled
Write "0": Invalid
Read "1": Interrupt enabled
Read "0": Interrupt disabled
Setting IDLDIES to "1" produces an E/S INT interrupt when the idle detect bit changes from "0" to "1."
Write "1": Interrupt enabled
Write "0": Invalid
Read "1": Interrupt enabled
Read "0": Interrupt disabled
B-III-10-32
EPSON
S1C33210 FUNCTION PART
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