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(5)
TXINT = HDLC transmit interrupt
Interrupt source The data in the transmit queue or transmit block satisfies the conditions below.
Condition
1. The software has not written data for the next frame by the time that the interface sends
2. The software has filled the transmit queue above the threshold before the interface sends
To clear
Write "1" to the reset TXINT bit
(6)
SPINT = HDLC Sp interrupt
A. Interrupt source: End of frame (EOF)
Condition
The receive block has detected a closing flag pattern. The interrupt timing depends on the
mode.
1. Rx INT and Sp INT on first receive character
2. Sp INT only
3. Rx INT and Sp INT on queue threshold with a threshold setting of 0
4. Rx INT and Sp INT on queue threshold with a nonzero threshold setting
To clear
Error reset command or arrival of next frame
B. Interrupt source: Rx overrun error
Condition
Incoming data has overwritten receive queue data (Other conditions are the same as for EOF
above.)
To clear
Error reset command
C. Interrupt source: Detection of short frame
Condition
Detection of a frame with fewer than 32 bits To clear
(7)
ESINT = HDLC E/S interrupt
A. Interrupt source: Tx underrun/EOM
Condition
The Tx underrun/EOM bit changes from "0" to "1." This bit goes to "1" when
1. The transmit block runs out of data during or after a frame.
2. The software issues a disable transmit command.
3. The software issues a send abort command.
To clear
Reset Tx underrun/EOM command
B. Interrupt source: Abort
Condition
The Abort bit changes (either direction) to indicate detection of an abort condition (seven or
more "1" bits in a row).
To clear
Reset E/S INT command
C. Interrupt source: Hunt
Condition
The signal latched into the Hunt bit changes (either direction).
A "1" in this bit indicates
A "0" in this bit indicates
To clear
Reset E/S INT command
S1C33210 FUNCTION PART
III PERIPHERAL BLOCK: MONITORED MOBILE ACCESS INTERFACES
the second CRC byte.
the second CRC byte.
After the software reads the corresponding byte from the receive data register
After the software reads the corresponding byte from the receive data register
When the corresponding byte reaches the head of the receive queue
When the corresponding byte enters the receive queue
1. No synchronization
2. Receive operation disabled
3. Abort pattern detected
1. Flag received in idle interval
2. Frame being received
EPSON
Error reset command
B-III-10-19
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