Dram (60Ns - Epson S1C33210 Technical Manual

Cmos 32-bit single chip microcomputer
Table of Contents

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APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGS
A.2 DRAM (60ns)
DRAM interface setup examples – 60ns
Operating
RAS precharge
frequency
20MHz
25MHz
33MHz
DRAM interface timing – 60ns
DRAM interface
Parameter
<Common parameters>
Random read/random write cycle time
#RAS precharge time
#RAS pulse width
#CAS pulse width
Row address setup time
Row address hold time
Column address setup time
#RAS #CAS delay time
#RAS column address delay time
<Read-cycle parameters>
#RAS access time
#CAS access time
Address access time
#OE access time
Output buffer turn-off time
<Write-cycle parameters>
Data input hold time
<Fast-page mode>
Fast-page mode cycle time
Fast-page mode #CAS precharge time
Access time after #CAS precharge
<Refresh cycle>
#CAS setup time
#CAS hold time
#RAS precharge #CAS hold time
#RAS pulse width (only in refresh cycle)
A-96
RAS cycle
cycle
1
1
2
1
2
2
Unit: ns
Symbol
Min.
t
110
RC
t
RP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
RCD
t
RAD
t
RAC
t
CAC
t
AA
t
OAC
t
OFF
t
DH
t
PC
t
CP
t
ACP
t
CSR
t
CHR
t
PPC
t
RAS
CAS cycle
2
2
2
33MHz
Max.
Cycle
Time
6
180
40
2
60
10000
4
120
15
10000
1.5
0
0.5
10
1.5
0
0.5
20
2.0
15
1.5
60
3.5
105
15
1.5
30
2.0
15
3.5
105
0
15
2
10
1.5
40
2.0
10
0.5
35
2.0
10
1.0
10
2.5
10
1.0
60
10000
3.0
EPSON
Refresh RAS pulse
Refresh RPC delay
width
2
2
3
25MHz
Cycle
Time
Cycle
5
200
60
2
80
3
120
45
1.5
60
15
0.5
20
45
0.5
20
15
0.5
20
60
1.0
40
45
0.5
20
2.5
100
45
1.5
60
60
2.0
80
2.5
100
60
2
80
45
1.5
60
60
2.0
80
15
0.5
20
60
2.0
80
30
1.0
40
75
1.5
60
30
1.0
40
90
2.0
80
S1C33210 PRODUCT PART
1
1
1
20MHz
Time
4
200
1
50
3
150
1.5
75
0.5
25
0.5
25
0.5
25
1.0
50
0.5
25
2.5
125
1.5
75
2.0
100
2.5
125
1
50
1.5
75
2.0
100
0.5
25
2.0
100
1.0
50
1.5
75
1.0
50
2.0
100

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