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No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any...
4.2.2 Supply voltage booster circuit ....................28 4.2.3 V voltage generator ......................28 4.2.4 V – voltage generator ......................28 4.2.5 LCD drive power supply circuit control procedure ..............29 Details of Control Registers .....................30 Precautions ........................31 INITIAL RESET ....................32 EPSON S1C88655 TECHNICAL MANUAL...
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15.3 Display Timing Generator ....................119 15.3.1 Generating frame signal ....................... 119 15.3.2 CL, FR signal outputs ......................121 15.4 Display Data RAM ......................121 15.5 Display Control ........................124 15.6 Details of Control Registers ....................125 15.7 Precautions ........................127 EPSON S1C88655 TECHNICAL MANUAL...
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Oscillation Characteristics ....................143 19.8 Characteristics Curves (reference value) ................144 PACKAGE FOR TEST SAMPLES ..............151 APPENDIX A PERIPHERAL CIRCUIT BOARD FOR S1C88655 (S5U1C88000P1 + S5U1C88655P2 + S5U1C88655T1) ....153 Names and Functions of Each Part .................153 Installation ........................156 A.2.1 Installing S5U1C88655P2 to S5U1C88000P1 ..............156 A.2.2 Installing into the ICE (S5U1C88000H5) ................
∗ Fonts supported 128 × 64-dot LCD panel. The S1C88655 has a built- 1) 12 × 12-dot Japanese font in large-capacity ROM that can store various font (JIS level-1 and level-2, other characters) 2) 12 ×...
Display Data RAM 48K bytes 8192 x 2 bits ROM (for Font Data) 512K bytes 8K bytes Fig. 1.2.1 S1C88655 block diagram 1.3 Pad Layout 1.3.1 Diagram of pad layout CA655Dxxx Upper left alignment mark ( ) Die No. (0, 0) Lower right alignment mark ( ) 11.7 mm...
LCD segment output terminals RESET I (Pull-up) Initial reset input terminal TEST I (Pull-up) Test input terminal ∗ (Pull-up): Pulled up (Hi-Z when Gate Direct is selected by mask option), (H): HIGH level output, (L): LOW level output EPSON S1C88655 TECHNICAL MANUAL...
IC's mask option. S1C88655 mask option list The following shows the option list for generating the IC's mask pattern. Note that the Peripheral Circuit Board installed in the ICE does not support some options.
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8 WATCHDOG TIMER OVERFLOW SIGNAL This mask option can select whether the watchdog timer 1. Interrupt (NMI) overflow signal is used to generate NMI or reset. Refer to 2. Reset Chapter 14, "Watchdog Timer", for details. EPSON S1C88655 TECHNICAL MANUAL...
3 MEMORY MAP 3 MEMORY MAP This chapter explains the memory configuration of the S1C88655. 3.1 MCU Single Chip Mode 3.2 MCU Expansion Mode The S1C88655 should be placed in single chip mode The S1C88655 must be placed in expansion mode...
Accesses to this area are always aimed at the display data RAM. 3.4.4 Font data ROM The S1C88655 has a built-in ROM that can be used to store font data. The ROM capacity is 512K bytes and is allocated to 010000H–08FFFFH.
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∗3 Cannot be turned OFF when the CPU is running with the OSC1 clock or the watchdog timer is enabled. ____ Note: All the interrupts including NMI are disabled, until you write the optional value into both the "00FF00H" and "00FF01H" addresses. EPSON S1C88655 TECHNICAL MANUAL...
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FSTRA1 Serial I/F 1 (transmit) interrupt factor flag FSERR0 Serial I/F 0 (error) interrupt factor flag FSREC0 Serial I/F 0 (receive) interrupt factor flag Reset No operation FSTRA0 Serial I/F 0 (transmit) interrupt factor flag EPSON S1C88655 TECHNICAL MANUAL...
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R16D R16 output port data R15D R15 output port data R14D R14 output port data High R13D R13 output port data R12D R12 output port data R11D R11 output port data R10D R10 output port data EPSON S1C88655 TECHNICAL MANUAL...
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PTM5 reload data D6 RDR55 PTM5 reload data D5 RDR54 PTM5 reload data D4 High RDR53 PTM5 reload data D3 RDR52 PTM5 reload data D2 RDR51 PTM5 reload data D1 RDR50 PTM5 reload data D0 (LSB) EPSON S1C88655 TECHNICAL MANUAL...
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00FF8F D7 PTM77 PTM7 data D7 (MSB) PTM76 PTM7 data D6 PTM75 PTM7 data D5 PTM74 PTM7 data D4 High PTM73 PTM7 data D3 PTM72 PTM7 data D2 PTM71 PTM7 data D1 PTM70 PTM7 data D0 (LSB) EPSON S1C88655 TECHNICAL MANUAL...
4 POWER SUPPLY 4 POWER SUPPLY This chapter explains the operating voltage and the configuration and control of the S1C88655 internal power supply circuit. 4.1 Operating Voltage 4.2 Internal Power Supply Circuit The S1C88655 operating power voltage is as The S1C88655 has a built-in power supply circuit as follows: shown in Figure 4.2.1 that generates all the voltages...
ON to supply the voltage booster "1" to the V voltage generator ON/OFF control C1–4 clock to the supply voltage booster circuit before register VCON and is deactivated by writing "0". turning the circuit ON. EPSON S1C88655 TECHNICAL MANUAL...
OFF in the reverse order of Figure 4.2.5.1 except hardware reset. See chapters "8 Oscillation Circuits", "13 Programmable Timer", and "15 LCD Driver" for controlling the OSC1 oscillation circuit, programmable timer, and display timing generator. EPSON S1C88655 TECHNICAL MANUAL...
LCD panel can be adjusted with both this register and the LRSEL0–LRSEL2 register. See Chapter 19, "Electrical Characteristics", for relationship between the setting values and the V voltage values. At initial reset, LEV is set to "0". EPSON S1C88655 TECHNICAL MANUAL...
5 INITIAL RESET 5 INITIAL RESET An initial reset must be applied to the S1C88655 to initialize the internal circuits. This chapter describes the internal initial reset circuits and default values of the CPU registers. Figure 5.1.1 shows the configuration of the initial 5.1 Configuration of...
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5 INITIAL RESET 5.1.2 Reset voltage detector (RVD) 5.1.3 Watchdog timer overflow signal The S1C88655 has a built-in reset voltage detector The watchdog timer overflow signal can be used as that can be enabled by mask option. This circuit has a a CPU reset signal by mask option.
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The respectively stipulated initializations are done for internal peripheral circuits. If necessary, the initialization should be done using software. For initial values at initial reset, see Section 3.5, "I/ O Memory", and peripheral circuit descriptions in the following chapters. EPSON S1C88655 TECHNICAL MANUAL...
The S1C88655 has bus terminals that can address a maximum of 1M × 4 bytes and memory (and other) (R24, R25) can be used as a general-purpose data register with read/write capabilities.
0FFFFFH Expansion mode External memory R31/CE1 CE0 area R32/CE2 The expansion mode setting applies when the S1C88655 is used with up to 1M bytes × 4 of R33/CE3 010000H 00FFFFH external expanded memory. I/O memory 00FF00H Because internal ROM is being used in the MCU...
(1) Minimum mode (CPUMOD = "0") In MCU mode: (2) Maximum mode (CPUMOD = "1") At initial reset, the S1C88655 is set in single chip mode (minimum). Minimum mode Accordingly, in MCU mode, even if a memory...
_____ Address Decoder (CE) Settings 6.4 WAIT State Settings The S1C88655 is equipped with address decoders In order to insure accessing of external low speed that can output a maximum of four chip enable devices during high speed operations, the S1C88655 _____ _______ signals (CE0–CE3) to external devices.
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Fig. 6.4.1 Memory read/write cycle (no wait state) WAIT (4 states inserted) WAIT (4 states inserted) A0–A19 Address Address D0–D7 Read data Write data Read cycle Write cycle Fig. 6.4.2 Memory read/write cycle (with wait state) EPSON S1C88655 TECHNICAL MANUAL...
_______ status. After setting the BREQ terminal to _______ The S1C88655 is equipped with a bus authority LOW level, hold the BREQ terminal at LOW _______ release function on request from an external device...
∗3 Cannot be turned OFF when the CPU is running with the OSC1 clock or the watchdog timer is enabled. ____ Note: All the interrupts including NMI are disabled, until you write the optional value into both the "00FF00H" and "00FF01H" addresses. EPSON S1C88655 TECHNICAL MANUAL...
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NMI are ________ P24 port terminal and the BACK terminal as the masked until you write an optional value into P25 port terminal. address "00FF00H". ________ ________ At initial reset, EBR is set to "0" (BREQ/BACK disabled). EPSON S1C88655 TECHNICAL MANUAL...
SPP ("00FF01H") and the stack pointer SP. Example: When setting the "178000H" address EP, #00H HL, #0FF01H During this period the [HL], #17H interrupts (including _______ SP, #8000H NMI) are masked. EPSON S1C88655 TECHNICAL MANUAL...
HALT mode the above has been set to "1". When the program executes the HALT instruc- tion, the S1C88655 enters HALT mode. (3) The interrupt priority register corresponding to Since the CPU stops operating in HALT mode, the above has been set to a priority level higher power consumption can be reduced with only than the interrupt flag (I0 and I1) setting.
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(I0 and I1), an interrupt will be generated to the CPU. Regardless of the interrupt enable register and interrupt priority register settings, the interrupt factor flag will be set to "1" by the occurrence of an interrupt factor. EPSON S1C88655 TECHNICAL MANUAL...
8 OSCILLATION CIRCUITS 8.1 Configuration of Oscillation 8.2 Mask Option Circuits OSC1 oscillation circuit The S1C88655 is twin clock system with two Crystal oscillation circuit internal oscillation circuits (OSC1 and OSC3). CR oscillation circuit The OSC3 oscillation circuit generates the main-...
The OSC3 oscillator types can be selected from crystal, ceramic, and CR by mask option. Figure 8.3.1 shows the configuration of the OSC3 oscillation circuit. OSC3 OSC3 X'tal 3 Ceramic OSC4 OSC3ON OSC3ON EPSON S1C88655 TECHNICAL MANUAL...
CPU clock STOP CPU clock STOP Standby Status * The return destination from the standby status becomes the program execution status prior to shifting to the standby status. Fig. 8.5.1 Status transition diagram for the clock changeover EPSON S1C88655 TECHNICAL MANUAL...
8 OSCILLATION CIRCUITS 8.6 Clock Output (FOUT) When the selected clock source is not activated, the In order for the S1C88655 to provide a clock to an external device, a FOUT signal (oscillation clock oscillation circuit must be turned ON before...
SLP instruction is stops when the SLP instruction is executed. executed. At initial reset, SOSC3 is set to "1" (OSC3 oscillation At initial reset, SOSC1 is set to "1" (OSC1 oscillation ON). ON). EPSON S1C88655 TECHNICAL MANUAL...
SLEEP status. Therefore, stop the FOUT output OSC3 before executing the SLP instruction. OSC3 OSC3 OSC1 OSC1 OSC1 OSC1 OSC1 oscillation frequency OSC1 OSC3 oscillation frequency OSC3 At initial reset, this register is set to "0" (f /1). OSC1 EPSON S1C88655 TECHNICAL MANUAL...
9 OUTPUT PORTS (R PORTS) Figure 9.1.1 shows the basic structure of the output 9.1 Configuration of Output Ports ports. The S1C88655 is equipped with 26 bits of output Address ports (R00–R07, R10–R17, R20–R25, R30–R33). Depending on the bus mode setting, the configura-...
R16D R16 output port data R15D R15 output port data R14D R14 output port data High R13D R13 output port data R12D R12 output port data R11D R11 output port data R10D R10 output port data EPSON S1C88655 TECHNICAL MANUAL...
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The high impedance control registers set for bus read/write capabilities which do not affect the signal output can be used as general-purpose output terminals. registers with read/write capabilities which do not affect the output terminals. EPSON S1C88655 TECHNICAL MANUAL...
P00–P07: D0–D7 10.1 Configuration of I/O Ports The P00–P07 terminals are shared with the data The S1C88655 is equipped with 24 bits of I/O ports bus D0–D7. When the bus mode is set to (P00–P07, P10–P17, P20–P27). expansion mode, they function as the data bus Figure 10.1.1 shows the structure of an I/O port.
Whether this resistor is used or not can be selected for each port (one bit unit). Furthermore, the interface level for each port in P10–P17 and P20–P27 can be selected from CMOS level and CMOS Schmitt level. EPSON S1C88655 TECHNICAL MANUAL...
(C + load capacitance on the board) x 1.6 [sec] : Pull up resistance Max. value : Terminal capacitance Max. value For unused ports, select "With resistor" and enable pull-up using the pull-up control registers. EPSON S1C88655 TECHNICAL MANUAL...
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This causes the input interrupt to 128/f (4 ms) OSC1 malfunction, therefore setup the input signal None – so that the rise/fall time is 25 nsec or less. ∗: When OSC1 = 32 kHz, OSC3 = 2 MHz EPSON S1C88655 TECHNICAL MANUAL...
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At initial reset, this register is set to "0" (input mode). Note: The I/O control registers of the ports that are configured to the data bus and serial interface inputs/outputs can be used as general-purpose registers that do not affect the terminal input/output status. EPSON S1C88655 TECHNICAL MANUAL...
Unnecessary interrupt may occur if the register is changed when the corresponding input port interrupts have been enabled by the interrupt enable register EP2x. At initial reset, this register is set to "0" (None). EPSON S1C88655 TECHNICAL MANUAL...
The direction of I/O port terminals set for serial 11.1 Configuration of Serial Interface interface input/output terminals are determined by The S1C88655 incorporates a full duplex serial the signal and transfer mode for each terminal. interface (when asynchronous system is selected)
SCSx0 and SCSx1 used to select the clock source are invalid. (c) Asynchronous 7-bit/8-bit mode Figure 11.3.1(b) shows the connection example Fig. 11.3.1 Connection examples of serial interface I/O terminals of input/output terminals in the clock synchronous slave mode. EPSON S1C88655 TECHNICAL MANUAL...
When interrupt has been enabled, an interrupt is generated when the transmission is completed. If there is subsequent data to be transmitted it can be sent using this interrupt. EPSON S1C88655 TECHNICAL MANUAL...
8, "Oscillation Circuits".) clock synchronous mode (6) Serial data input/output permutation Below is a description of initialization when The S1C88655 provides the data input/output performing clock synchronous transfer, transmit- permutation select register SDPx to select receive control procedures and operations.
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SOUTx terminal. When the final bit (MSB when "LSB first" is selected, or LSB when "MSB first" is selected) is output, the SOUTx terminal is maintained at that level, until the next transmitting begins. EPSON S1C88655 TECHNICAL MANUAL...
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At this time, since the SRDYx terminal is not set Interrupt and instead P13 (P17) functions as the I/O port, (d) Receive timing for slave mode you can apply this port for said control. Fig. 11.6.4 Timing chart (clock synchronous system transmission, LSB first) EPSON S1C88655 TECHNICAL MANUAL...
Here following, we will explain the control se- them all with one instruction. quence and operation for initialization and trans- mitting /receiving in case of asynchronous data transfer. See "11.8 Interrupt Function" for the serial interface interrupts. EPSON S1C88655 TECHNICAL MANUAL...
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(8) Serial data input/output permutation (1) Write "0" in the transmit enable register TXENx The S1C88655 provides the data input/output to reset the serial interface. permutation select register SDPx to select whether the serial data bits are transferred from (2) Write "1"...
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The received data at this point cannot assured point. (When an overrun error is generated, the because of the parity error. interrupt factor flag FSRECx is not set to "1" and a receiving complete interrupt is not generated.) EPSON S1C88655 TECHNICAL MANUAL...
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D0 D1 D2 D3 D4 D5 D6 D7 (In 8-bit mode/Non parity) RXDx 1st data 2nd data OERx control signal OERx Interrupt (b) Receive timing Fig. 11.7.4 Timing chart (asynchronous transfer, LSB first, stop bit = 1 bit) EPSON S1C88655 TECHNICAL MANUAL...
Chapter 7, "Interrupt The following transmitting data can be set and and Standby Status". the transmitting start (writing "1" to TXTC5m operatThe foll8n Figure 11.8.1 shows the configuration of the serial interface interrupt circuit. EPSON S1C88655 TECHNICAL MANUAL...
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The exception processing vector address is set as follows: The exception processing vector address is set as follows: Ch. 0 receive error interrupt: 000026H Ch. 1 receive error interrupt: 00002CH Ch. 0 receiving complete interrupt: 000028H Ch. 1 receiving complete interrupt: 00002EH EPSON S1C88655 TECHNICAL MANUAL...
SIF0 receive data D6 RXD05 SIF0 receive data D5 RXD04 SIF0 receive data D4 High RXD03 SIF0 receive data D3 RXD02 SIF0 receive data D2 RXD01 SIF0 receive data D1 RXD00 SIF0 receive data D0 (LSB) EPSON S1C88655 TECHNICAL MANUAL...
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SIF1 receive data D6 RXD15 SIF1 receive data D5 RXD14 SIF1 receive data D4 High RXD13 SIF1 receive data D3 RXD12 SIF1 receive data D2 RXD11 SIF1 receive data D1 RXD10 SIF1 receive data D0 (LSB) EPSON S1C88655 TECHNICAL MANUAL...
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"0" is written, it is set to 1 bit. OSC3 In clock synchronous mode, no start/stop bits can be added to transfer data. Therefore, setting STPBx becomes invalid. At initial reset, STPBx is set to "0" (1 bit). EPSON S1C88655 TECHNICAL MANUAL...
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"1" to RXTRGx in the asynchronous mode. OERx is reset to "0" by writing "1". At initial reset and when RXENx is "0", OERx is set to "0" (no error). EPSON S1C88655 TECHNICAL MANUAL...
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When "1" is written: MSB first When "0" is written: LSB first Reading: Valid Select whether the data input/output permutation will be MSB first or LSB first. At initial reset, SDPx is set to "0" (LSB first). EPSON S1C88655 TECHNICAL MANUAL...
Refer to the oscillation start time example indicated in Chapter 19, "Electrical Characteristics".) At initial reset, the OSC3 oscillation circuit is set to ON status. EPSON S1C88655 TECHNICAL MANUAL...
12 CLOCK TIMER 12.1 Configuration of Clock Timer 12.2 Interrupt Function The S1C88655 has built in a clock timer that uses The clock timer can generate an interrupt by each of the OSC1 oscillation circuit as clock source. The the 32 Hz, 8 Hz, 2 Hz and 1 Hz signals.
In the case of the STOP status, the reset data "00H" is maintained. No operation results when "0" is written to the TMRST. Since the TMRST is exclusively for writing, it always becomes "0" during reading. EPSON S1C88655 TECHNICAL MANUAL...
RUN status (TMRUN = "1"). The clock timer operation will become unstable when returning from SLEEP status. Therefore, when shifting to SLEEP status, set the clock timer to STOP status (TMRUN = "0") prior to executing the SLP instruction. EPSON S1C88655 TECHNICAL MANUAL...
13 PROGRAMMABLE TIMER 13 PROGRAMMABLE TIMER 13.1 Configuration of Programmable Timer The S1C88655 has four built-in 16-bit program- The reload data register is used to set an initial value mable timer systems. Each system timer consists of to the down counter.
1 enter the 8-bit mode (8-bit × 2 channels) and shows the configuration of the control registers. when "1" is set, they enter the 16-bit mode (16-bit × 1 channel). In the 8-bit mode, Timers 0 and 1 can be controlled individually. EPSON S1C88655 TECHNICAL MANUAL...
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Timer(L) and Timer(H) in explanations for 16-bit mode. Timer(L) = Timer 0, Timer 2, Timer 4 or Timer 6 Timer(H) = Timer 1, Timer 3, Timer 5 or Timer 7 This is used for register names. EPSON S1C88655 TECHNICAL MANUAL...
OSC3 can data register. This underflow generates an be used. See Chapter 8, "Oscillation Circuits" for interrupt, and controls the clock (TOUTx the controlling of the OSC3 oscillation circuit. signal) output. EPSON S1C88655 TECHNICAL MANUAL...
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∗ 1. Be especially careful when using the OSC1 (low-speed clock) as the clock source of the programmable timer and the CPU is operating with the OSC3 (high-speed clock). EPSON S1C88655 TECHNICAL MANUAL...
3 2 1 0 7 6 5 4 3 2 1 Compare match signal Underflow signal TOUTx signal CDR register value RDR register value + 1 PTOUTx/RPTOUTx Output from TOUTx (P20/P21) terminal Output from TOUTx (P23) terminal Fig. 13.6.1 Output waveform of TOUT signal EPSON S1C88655 TECHNICAL MANUAL...
(Hz) The Timer 5 underflow signal is divided by 2 before : Frame frequency (Hz) supplying to the display timing generator, so set a value represented by the following expressions to the register RDR5x. EPSON S1C88655 TECHNICAL MANUAL...
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"0" when being read – R/W register Reserved register PTOUT0 PTM0 clock output control PTRUN0 PTM0 Run/Stop control Stop PSET0 PTM0 preset Preset No operation "0" when being read CKSEL0 PTM0 input clock selection External clock Internal clock EPSON S1C88655 TECHNICAL MANUAL...
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00FF36 PTM07 PTM0 data D7 (MSB) PTM06 PTM0 data D6 PTM05 PTM0 data D5 PTM04 PTM0 data D4 High PTM03 PTM0 data D3 PTM02 PTM0 data D2 PTM01 PTM0 data D1 PTM00 PTM0 data D0 (LSB) EPSON S1C88655 TECHNICAL MANUAL...
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PTM2 compare data D6 CDR25 PTM2 compare data D5 CDR24 PTM2 compare data D4 High CDR23 PTM2 compare data D3 CDR22 PTM2 compare data D2 CDR21 PTM2 compare data D1 CDR20 PTM2 compare data D0 (LSB) EPSON S1C88655 TECHNICAL MANUAL...
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PTM4 reload data D6 RDR45 PTM4 reload data D5 RDR44 PTM4 reload data D4 High RDR43 PTM4 reload data D3 RDR42 PTM4 reload data D2 RDR41 PTM4 reload data D1 RDR40 PTM4 reload data D0 (LSB) EPSON S1C88655 TECHNICAL MANUAL...
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"0" when being read – R/W register Reserved register – R/W register PTRUN6 PTM6 Run/Stop control Stop PSET6 PTM6 preset Preset No operation "0" when being read CKSEL6 PTM6 input clock selection External clock Internal clock EPSON S1C88655 TECHNICAL MANUAL...
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00FF8E D7 PTM67 PTM6 data D7 (MSB) PTM66 PTM6 data D6 PTM65 PTM6 data D5 PTM64 PTM6 data D4 High PTM63 PTM6 data D3 PTM62 PTM6 data D2 PTM61 PTM6 data D1 PTM60 PTM6 data D0 (LSB) EPSON S1C88655 TECHNICAL MANUAL...
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16/f seconds OSC1 in width as noise and rejects them. When PTNREN_A (–D) is "0", the external clock bypasses the noise rejector. At initial reset, this register is set to "0" (disabled). EPSON S1C88655 TECHNICAL MANUAL...
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PSTx register is output to invalid. Timer x. At initial reset, PTMx is set to "FFH". When "0" is written, the clock is not output. At initial reset, the this register is set to "0" (OFF). EPSON S1C88655 TECHNICAL MANUAL...
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At initial reset, this register is set to "0" (STOP). fixed at "0". At initial reset, this register is set to "0" (DC output). Note: If RPTOUT2 and RPTOUT3 are set to "1" at the same time, RPTOUT3 is effective. EPSON S1C88655 TECHNICAL MANUAL...
(3) In the 16-bit mode, reading PTM(L) does not latch the Timer(H) counter data in PTM(H). To avoid generating a borrow from Timer(L) to Timer(H), read the counter data after stopping the timer by writing "0" to PTRUN(L). EPSON S1C88655 TECHNICAL MANUAL...
14 WATCHDOG TIMER 14 WATCHDOG TIMER 14.1 Configuration of Watchdog Timer 14.2 Mask Option The S1C88655 has a built-in watchdog timer that The watchdog timer overflow cycle can be selected uses the OSC1 oscillation circuit as its clock source. by mask option.
NMI interrupt has occurred (when f OSC1 reset, after which it is immediately restarted. is 32.768 kHz). Writing "0" will mean no operation. Since WDRST is for writing only, it is constantly set to "0" during readout. EPSON S1C88655 TECHNICAL MANUAL...
15 LCD DRIVER 15.1 Configuration of LCD Driver 15.2 LCD Power Supply The S1C88655 has a built-in dot matrix LCD driver The on-chip power supply circuit generates the that can drive an LCD panel with a maximum of LCD drive voltages V –V...
15.3.2 CL, FR signal outputs 15.4 Display Data RAM The CL signal (LCD synchronous clock) and FR The S1C88655 has a built-in 2K-byte display data signal (LCD alternating signal) that are generated RAM (8192 bits per screen × 2). The display data by the display timing generator can be output RAM is allocated to address E000H–EF7FH.
SEG terminals output an OFF waveform (V or V ) and all the COM terminals output an OFF waveform (V ). This software control does not affect the contents of the display data RAM. EPSON S1C88655 TECHNICAL MANUAL...
The display timing generator also outputs the voltage booster clock to generate the LCD drive voltages. Therefore, be sure to select a source clock before turning the on-chip power supply circuit At initial reset, LCDCS is set to "00" (OFF). EPSON S1C88655 TECHNICAL MANUAL...
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When LCLK is set to "1", the CL signal is output from the P26 terminal. When LCLK is set to "0", the P26 terminal functions as an I/O port. At initial reset, LCLK is set to "0" (CL signal output OFF). EPSON S1C88655 TECHNICAL MANUAL...
(3) Be sure to set LCDCS0–1, LCDON, VCON, VC5ON and LBON to OFF before executing the SLP instruction. Also note that a hazard may occur if LCDCS0–1 is changed when LCLK and LFRM is ON. EPSON S1C88655 TECHNICAL MANUAL...
(SVD) CIRCUIT 16.1 Configuration of SVD Circuit 16.2 SVD Operation The S1C88655 has a built-in SVD (supply voltage The SVD circuit compares the criteria voltage set by detection) circuit, so that the software can find software and the supply voltage (V –V...
Supply voltage (V –V < Criteria voltage Writing: Invalid The result of supply voltage detection at time of SVDON is set to "0" can be read from this latch. At initial reset, SVDDT is set to "0". EPSON S1C88655 TECHNICAL MANUAL...
(instructions) Consumption are explained. You should refer to these when programming. The S1C88655 can turn circuits, which consume a large amount of power, ON or OFF by control See Chapter 19, "Electrical Characteristics", for the current consumption.
Disturbances of the oscillation clock due to noise may cause a malfunction. Consider the following points to prevent this: s.JMrs8t0 7 dp*4S2 880nempo.3wmar026 7 dp8ca5kcf9iae0s.Je80nem..aEE 0 7 c82Fem..aEE 0 6E 0 f9 O22282J808fn EPSON S1C88655 TECHNICAL MANUAL...
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(2) The inspection process of the product needs an environment that shields the IC from visible radiation. (3) As well as the face of the IC, shield the back and side too. EPSON S1C88655 TECHNICAL MANUAL...
Capacitor for RESET terminal 30 pF (Ceramic oscillation) the reset voltage detection Drain capacitor 15 pF (Crystal oscillation) circuit is used.) 30 pF (Ceramic oscillation) Note: The above table is simply an example, and is not guaranteed to work. EPSON S1C88655 TECHNICAL MANUAL...
Capacitor between CA4P and CA2M µF Capacitor between CA2P and CA2M Note) 1 When LCD drive power is not used, the capacitor is not necessary. Configuration of C –C is different depending on the boosting ratio. EPSON S1C88655 TECHNICAL MANUAL...
= 0 V, f = 1 MHz, Ta = 25°C Note) 1 When CMOS level is selected by mask option. When CMOS Schmitt level is selected by mask option. When addition of pull-up resistor is selected by mask option. EPSON S1C88655 TECHNICAL MANUAL...
LRSEL2–0 = 1 LRSEL2–0 = 0 Operating voltage range 0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 LEV5–0: Level 0–63 Operating voltage range output voltage adjustment range (Typ.) EPSON S1C88655 TECHNICAL MANUAL...
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Reset signal Reset signal Reset signal negated negated negated ∗1 Unsteady reset range ∗2 Reset hold range (Reset status is held for a certain time after the power supply voltage exceeds the reset release level.) EPSON S1C88655 TECHNICAL MANUAL...
This value is added to the current consumption in SLEEP mode/in HALT mode/during execution when the LCD driver circuit is active. LCDCS0–1 = "01", LBON = "1", VC5ON = "1", LBIAS = "1", DSPC0–1 = "01", LRSEL0–2 and LEV0–5 = arbitrarily EPSON S1C88655 TECHNICAL MANUAL...
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* In the case of crystal oscillation and ceramic oscillation: h = 0.5 h (1/ c: oscillation frequency) c ± 0.10 * In the case of CR oscillation: h = 0.5 h (1/ c: oscillation frequency) EPSON S1C88655 TECHNICAL MANUAL...
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When a HIGH level is detected, the start bit detection circuit is reset and goes into a wait status until the next start bit. (Time as far as AC is excluded.) SCLK OUT SOUT SCLK IN SOUT Start bit Stop bit Sampling clock Erroneous start bit detection signal EPSON S1C88655 TECHNICAL MANUAL...
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___________ • RESET input clock Condition: V = 1.8 to 3.6 V, V = 0 V, Ta = 25°C, V = 0.5V = 0.1V Item Symbol Min. Typ. Max. Unit Note µs RESET input time RESET EPSON S1C88655 TECHNICAL MANUAL...
Frequency/power voltage deviation ppm/V ∂ ∂ Frequency adjustment range = constant, C = 0 to 25 pF C-002RX Made by EPSON TOYOCOM OSC1 (CR) Unless otherwise specified: V = 1.8 to 3.6 V, V = 0 V, Ta = 25°C Item Symbol Condition Min.
Ta = 70°C, Min. value = 3.6 V = 2.4 V = 1.8 V voltage - temperature characteristic Typ. value, V = 8 V 1.05V 1.04V 1.03V 1.02V 1.01V 1.00V 0.99V 0.98V 0.97V 0.96V 0.95V Ta [°C] EPSON S1C88655 TECHNICAL MANUAL...
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1.05V 1.04V 1.03V 1.02V 1.01V 1.00V 0.99V 0.98V 0.97V 0.96V 0.95V Ta [°C] In HALT status current consumption - temperature characteristic (During operation with OSC1) <Crystal oscillation, f = 32.768 kHz> OSC1 Typ. value Ta [°C] EPSON S1C88655 TECHNICAL MANUAL...
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In HALT status current consumption - resistance characteristic (During operation with OSC3) <CR oscillation> Ta = 25°C Max. Typ. 1000 [kΩ] In HALT status current consumption - frequency characteristic (During operation with OSC3) <Crystal oscillation/Ceramic oscillation> Ta = 25°C Max. Typ. [MHz] OSC3 EPSON S1C88655 TECHNICAL MANUAL...
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In executed status current consumption - resistance characteristic (During operation with OSC1) <CR oscillation> Ta = 25°C Max. Typ. 1000 10000 [kΩ] In executed status current consumption - resistance characteristic (During operation with OSC3) <CR oscillation> Ta = 25°C Max. Typ. 1000 [kΩ] EPSON S1C88655 TECHNICAL MANUAL...
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Ta = 25°C, Typ. value, V = 8 V, white screen displayed Quintuple boosted Quadruple boosted Triple boosted Ta = 25°C, Typ. value, V = 8 V, checker pattern displayed Quintuple boosted Quadruple boosted Triple boosted EPSON S1C88655 TECHNICAL MANUAL...
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(The OSC3 resistance value should be set to R • OSC1 oscillation frequency - resistor characteristic Ta = 25°C, Typ. value 1000 1000 10000 [kΩ] • OSC1 oscillation frequenc - temperature characteristic Typ. value, R = 1500 kΩ 1000 Ta [°C] EPSON S1C88655 TECHNICAL MANUAL...
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19 ELECTRICAL CHARACTERISTICS • OSC3 oscillation frequency - resistor characteristic Ta = 25°C, Typ. value 10000 1000 1000 [kΩ] • OSC3 oscillation frequenc - temperature characteristic Typ. value, R = 39 kΩ 10000 1000 Ta [°C] EPSON S1C88655 TECHNICAL MANUAL...
BOARD FOR S1C88655 (S5U1C88000P1 + S5U1C88655P2 + S5U1C88655T1) This manual describes how to use the Peripheral Circuit Board for S1C88655 (S5U1C88000P1 + S5U1C88655P2 + S5U1C88655T1). This circuit board is used to provide emulation functions when it is installed in the ICE (S5U1C88000H5), a debugging tool for the 8-bit Single Chip Microcomputer S1C88 Family.
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APPENDIX A PERIPHERAL CIRCUIT BOARD FOR S1C88655 (S5U1C88000P1 + S5U1C88655P2 + S5U1C88655T1) (1) SW1 (12) LED 4 (CLKCHG) When downloading circuit data, set this switch Indicates the CPU operating clock. to the "3" position. Otherwise, set to position "1". Lit: OSC3 (CLKCHG register = "1")
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APPENDIX A PERIPHERAL CIRCUIT BOARD FOR S1C88655 (S5U1C88000P1 + S5U1C88655P2 + S5U1C88655T1) (21) LED 13 (26) I/O #1, I/O #3 connectors Unused. These are the connectors for connecting the I/ O and LCD panel board. The I/O cables (80- (22) LED 14 (OSC1 operating clock) pin/40-pin ×...
APPENDIX A PERIPHERAL CIRCUIT BOARD FOR S1C88655 (S5U1C88000P1 + S5U1C88655P2 + S5U1C88655T1) A.2 Installation A.3 Connecting to the Target System This section explains how to connect the A.2.1 Installing S5U1C88655P2 S5U1C88000P1 + S5U1C88655P2 to the target to S5U1C88000P1 system and the LCD panel board (S5U1C88655T1).
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APPENDIX A PERIPHERAL CIRCUIT BOARD FOR S1C88655 (S5U1C88000P1 + S5U1C88655P2 + S5U1C88655T1) Notes: • The LCD panel board operating clock frequency is limited to that of the connected LCD module (standard TCM). • If the LCD panel is out of synchronization...
APPENDIX A PERIPHERAL CIRCUIT BOARD FOR S1C88655 (S5U1C88000P1 + S5U1C88655P2 + S5U1C88655T1) A.4 Downloading Circuit Data to A.5 Precautions the S5U1C88000P1 Take the following precautions when using the Peripheral Circuit Board for S1C88655. This board (S5U1C88000P1) comes with the FPGA that contains factory inspection data, therefore the A.5.1 Precaution for operation...
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(LED 8: monitor pin 8) select the appropriate operating frequency. g) V voltage generator (LED 9: monitor pin 9) • The Peripheral Circuit Board for S1C88655 does h) V voltage generator C1–4 not include the OSC3 ceramic oscillation circuit. (LED 10: monitor pin 10)
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• This board contains oscillation circuits for When using this board for development of an OSC1 and OSC3. Keep in mind that even S1C88655 application, be sure not to read and though the actual IC may not have a resonator write from/to I/O memory addresses FF22H and FFC0H to FFDDH.
• S5U1C88655R1 12 × 12-dot Japanese font (JIS level-1 and level-2, other characters) • S5U1C88655R3 12 × 12-dot Korean font (KSX1001) Please contact Seiko Epson for other font pack- User-developed program ages. Compile Assemble Font data Linker...
TCM is provided as the 3. Input port pull-up resistors ___________ standard packaging form for the S1C88655 and the RESET With pull-up resistor _______ standard TCM has been released. Furthermore,...
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APPENDIX C TCM Standard TCM outline drawing (die-cut pattern before assembly) LCD panel side FPC connector side TOP VIEW ∗ Recommended FPC connectors: FH23 series (Hirose Electric Co., LTD.) EPSON S1C88655 TECHNICAL MANUAL...