Epson S1C33210 Technical Manual page 109

DRAM: 70ns, CPU: 25/20MHz, random read/write cycle
BCLK
A[11:0]
#RAS
#CAS
D[15:0](RD)
#WE
D[15:0](WR)
DRAM: 70ns, CPU: 25/20MHz, page-mode read/write cycle
BCLK
A[11:0]
#RAS
#CAS
#RD
D[15:0](RD)
#WE
D[15:0](WR)
DRAM: 70ns, CPU: 25/20MHz, CAS-before-RAS refresh cycle
BCLK
#RAS
#CAS
S1C33210 PRODUCT PART
APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGS
RAS cycle
1
ROW #1
#RD
WR data
RAS cycle CAS cycle
1 2
ROW #1 COL #1
WR data
RPC delay Fixed Refresh RAS pulse width
1 1
t t
RPC CSR
CAS cycle RAS precharge
2
COL #1
t
RAS
RD data
CAS cycle
2
COL #2
t
RAS
RD data
WR data
RAS precharge
2
t
RAS
t
CHR
EPSON
2
ROW #2
RAS precharge
2
RD data
2
A-95