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A10DRA: Area 10 burst ROM selection (D8) / Areas 10–9 set-up register (0x48126)
A9DRA: Area 9 burst ROM selection (D7) / Areas 10–9 set-up register (0x48126)
Set areas 10 and 9 for use of burst ROM.
Write "1": Burst ROM is used
Write "0": Burst ROM is not used
Read: Valid
When using burst ROM, write "1" to the control bit. The ordinary SRAM interface is selected by writing "0" to the
bit.
Area 9 can only be used when the CEFUNC = "00".
At cold start, these bits are set to "0" (burst ROM not used). At hot start, the bits retain their status before being
initialized.
RBCLK: BCLK output control (DF) / Bus control register (0x4812E)
Control the bus clock BCLK to enable or disable external output.
Write "1": Fixed at high level
Write "0": Output enabled
Read: Valid
To stop outputting the bus clock from the BCLK pin, write "1" to RBCLK. When the clock output is stopped, the
BCLK pin is fixed at high level. The bus clock output from the BCLK pin is enabled by writing "0" to RBCLK.
The bus clock output from the BCLK pin also is stopped in the HALT2 and the SLEEP modes.
At cold start, the RBCLK is set to "0" (output enabled). At hot start, RBCLK retains its status before being
initialized.
RBST8: Burst mode selection (DD) / Bus control register (0x4812E)
Set the operation mode during a burst read.
Write "1": 8-successive-burst mode
Write "0": 4-successive-burst mode
Read: Valid
The 8-successive-burst mode is selected by writing "1" to RBST8 and the 4-successive-burst mode is selected by
writing "0" to RBST8. This setting is valid when areas 10 and 9 are set for burst ROM, and the setting is applied to
both areas simultaneously.
At cold start, RBST8 is set to "0" (4-successive-burst mode). At hot start, RBST8 retains its status before being
initialized.
REDO: Page mode selection (DC) / Bus control register (0x4812E)
Select the page mode of DRAM.
Write "1": EDO-page mode
Write "0": Fast-page mode
Read: Valid
When using EDO DRAM, write "1" to REDO to select the EDO-page mode.
The contents set here are applied to all of areas 14, 13, 8, and 7 that are set for DRAM.
At cold start, REDO is set to "0" (fast-page mode). At hot start, REDO retains its status before being initialized.
S1C33210 FUNCTION PART
II CORE BLOCK: BCU (Bus Control Unit)
EPSON
B-II-4-39
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