Epson S1C33210 Technical Manual page 108

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGS
DRAM: 70ns, CPU: 33MHz, random read/write cycle
BCLK
A[11:0]
t
ASR
#RAS
#CAS
#RD
D[15:0](RD)
#WE
D[15:0](WR)
DRAM: 70ns, CPU: 33MHz, page-mode read/write cycle
RAS cycle
BCLK
A[11:0]
ROW #1
#RAS
#CAS
#RD
D[15:0](RD)
#WE
D[15:0](WR)
DRAM: 70ns, CPU: 33MHz, CAS-before-RAS refresh cycle
RPC delay
BCLK
#RAS
#CAS
A-94
RAS cycle
2
ROW #1
t
RAD
t t
RAH ASC
t
RCD
t
RAC
t
OAC
t
DS
WR data
CAS cycle
2
COL #1
WR data
Fixed Refresh RAS pulse width
1 1
t t
RPC CSR
t
RC
CAS cycle
3
COL #1
t
RAS
t
CAS
t
AA
t
CAC
RD data
t
WP
t
DH
3
t
RAS
t
CP
RD data
3
t
RAS
t
CHR
EPSON
RAS precharge
2
ROW #2
t
RP
t
OFF
t
PC
CAS cycle RAS precharge
3
COL #2
t
ACP
RD data
WR data
RAS precharge
2
S1C33210 PRODUCT PART
2