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6 Basic External Wiring Diagram
A[23:0]
D[15:0]
#RD
#DRD
#GARD
#GAAS
#WRL/#WR/#WE
#WRH/#BSH
#DWR
#HCAS
External
#LCAS
Bus
#CExx/#RASx
#CE10EX
#WAIT
BCLK
#BUSREQ
#BUSACK
#BUSGET
#NMI
#DMAREQx
#DMAACKx
HSDMA
#DMAENDx
SINx
SOUTx
Serial I/O
#SCLKx
#SRDYx
#ADTRG
A/D input
ADx
EXCLx
Timer
TMx
input/output
T8UFx
Input
Kxx
Pxx
I/O
RI
CTS
Mobile access
DTD
Interface input
DSR
RXD
MSEL
DTR
RTS
Mobile access
TXD
Interface output
CNT1
CNT2
GOUT
X'tal1
C
G1
C
D1
Rf
1
X'tal2
CR
C
G2
C
D2
Rf
2
R
1
C
1
C
2
Note: The above table is simply an example, and is not guaranteed to work.
S1C33210 PRODUCT PART
S1C33210
[The potential of the substrate
(back of the chip) is V
Crystal oscillator
32.768 kHz, C
Gate capacitor
10 pF
Drain capacitor
10 pF
Feedback resistor
10 M
Crystal oscillator
33 MHz (Max.)
Ceramic oscillator
33 MHz (Max.)
Gate capacitor
10 pF
Drain capacitor
10 pF
Feedback resistor
1 M
Resistor
4.7 k
Capacitor
100 pF
Capacitor
5 pF
6 BASIC EXTERNAL WIRING DIAGRAM
V
DD
AV
DD
DSIO
TST
EA10MD0
EA10MD1
#X2SPD
PLLC
.]
SS
PLLS0
PLLS1
OSC3
OSC4
OSC1
OSC2
#RESET
V
SS
(Max.) = 34 k
I
EPSON
+
1
C
2
R
1
C
1
C
X'tal2
G2
Rf
or
2
C
CR
D2
C
G1
X'tal1
Rf
1
C
D1
1: When the PLL is not used,
leave the PLLC pin open.
3.3V
A-65
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