Epson S1C33210 Technical Manual page 105

Cmos 32-bit single chip microcomputer
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No.
Pad name
201 N.C.
202 P23/TM1
203 N.C.
204 DSIO
205 N.C.
206 P10/EXCL0/T8UF0/DST0
207 P11/EXCL1/T8UF1/DST1
208 N.C.
209 P12/EXCL2/T8UF2/DST2
210 P13/EXCL3/T8UF3/DPC0
211 P14/FOSC1/DCLK
212 P24/TM2/#SRDY2
213 N.C.
214 P25/TM3/#SCLK2
215 N.C.
216 N.C.
Note: The S1C33210 is constructed with 0.35 m process technology. Since the pad pitch is to small, it is
impossible to use all pads when mounting the chip (die form) on the board. When mounting the
chip use the pads other than "N.C." and "N.C. (xxxx)". The pads which is indicated with "N.C.
(xxxx)" in the table is available in the QFP15-128pin package.
S1C33210 PRODUCT PART
X
Y
-2.834
-0.966
-2.834
-1.05
-2.834
-1.134
-2.834
-1.218
-2.834
-1.302
-2.834
-1.386
-2.834
-1.47
-2.834
-1.554
-2.834
-1.638
-2.834
-1.722
-2.834
-1.806
-2.834
-1.89
-2.834
-1.974
-2.834
-2.058
-2.834
2.154
-2.834
-2.154
EPSON
10 PAD LAYOUT
A-91

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