Epson S1C33210 Technical Manual page 555

Cmos 32-bit single chip microcomputer
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Register name
Address
Bit
HDLC residue
0200332
D15–8
code register
(HW)
D7
D6
D5
D4
D3
D2
D1
D0
HDLC transmit
0200334
D15–8
status register
(HW)
D7
D6
D5–1
D0
HDLC monitor
0200336
D15–8
register
(HW)
D7
D6
D5
D4
D3–0
S1C33210 FUNCTION PART
Name
Function
RCODE7
Residue Code
RCODE6
Number of valid bits in excess
RCODE5
residue code bits at end of frame
RCODE4
RCODE3
RCODE2
RCODE1
RCODE0
TXUE
Tx underrun/EOM detected
TXBRDY
Transmit queue not full
TXUDR
Transmit queue underrun
ESINT
E/S INT interrupt
SPINT
Sp INT interrupt
RXINT
Rx INT interrupt
TXINT
Tx INT interrupt
Setting
RCODE[7:0]
Effective bits
11111110
11111100
11111000
11110000
11100000
11000000
10000000
1 Yes
0 No
1 not Full
0 Full
1 Under run
0 No underrun
1 Request pending 0 No interrupts
1 Request pending 0 No interrupts
1 Request pending 0 No interrupts
1 Request pending 0 No interrupts
EPSON
APPENDIX: I/O MAP
Init. R/W
Remarks
0 when being read.
X
R
Only valid when
7
X
RESID = 1
6
X
5
X
4
X
3
X
2
X
1
X
0 when being read.
X
R
X
R
0 when being read.
X
R
0 when being read.
X
R
X
R
X
R
X
R
0 when being read.
B-APPENDIX-47

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