Epson S1C33210 Technical Manual page 97

DRAM CAS-before-RAS refresh cycle
BCLK
#RAS
#HCAS/
#LCAS
#WE
DRAM self-refresh cycle
BCLK
#RAS
#HCAS/
#LCAS
Burst ROM read cycle
SRAM read cycle
BCLK
t
AD
A[23:2]
t
AD
A[1:0]
t
CE1
#CEx
#RD
t
ACC2
t
CEAC
t
RDAC2
D[15:0]
t
1 is measured with respect to the first signal change (negation) from among the #RD, #CEx and A[23:0]
RDH
signals.
S1C33210 PRODUCT PART
C
CBR1
t
CASD1
Self-refresh mode setup
t
RASD1
t
CASD1
Burst cycle
t
AD
t
RDD1
t
ACCB
t t
RDS RDS
t
RDH
8 ELECTRICAL CHARACTERISTICS
CBR refresh cycle
C
CBR2
t
RASD1
t
Self-refresh mode Self-refresh mode canceration
6-cycle precharge
t
RASD2
t
CASD2
Burst cycle
t
AD
t
ACCB
t
RDS
t
RDH
EPSON
C
CBR3
t
RASD2
CASD2
(Fixed)
Burst cycle
t
AD
t
ACCB
t
RDS
t
RDH
t
AD
t
AD
t
CE2
t
RDD2
1
t
RDH
A-83