Input Interrupts (Direct Mode) - Omron CP1H CPU Operation Manual

Interrupt Functions
5-1-2

Input Interrupts (Direct Mode)

Input Interrupt Bit and
Terminal Allocations
X/XA CPU Units
188
b. The following example shows duplicate processing by an interrupt
task, which interrupts processing while BSET is writing to a block of
words and yields an incorrect comparison result.
Cyclic task
BSET
#1234
D0
D10
Flow of Processing
#1234 set in D0.
#1234 set in D1.
Interrupted.
CMP(020)
BSET(071)
processing processing
Continued.
#1234 set in D2.
#1234 set in D10.
Since the interrupt occurs during BSET(071) processing and before #1234 is
set in D10, the content of D0 and D10 do not match when the comparison is
made in the interrupt task (*1) and output A remains OFF.
In the end (*2), the D0 and D10 both contain #1234 and match, but the correct
comparison result is not reflected in comparison result output A.
Prevention of Duplicate Processing
Cyclic task
DI
BSET
EI
This function executes an interrupt task when the corresponding input signal
(up or down differentiated) is received.
The following diagrams show the input bits and terminals that are used for the
input interrupt function in each CPU Unit.
The 8 input bits CIO 0.00 to CIO 0.03 and CIO 1.00 to CIO 1.03 can be used
for input interrupts.
Interrupt task
CMP
A
Equals Flag
Interrupt occurs.
Read D0.
Read D1.
Compare D0 and D10.
Output result.
Interrupt completed.
Disables execution of
interrupt programs.
#1234
D0
D10
Enables execution of
interrupt programs.
Section 5-1
D0
D10
D0 D1 D2
D10
1234 003E 0502 ABCD OFF
1234
1234
ABCD
OFF*
0502
1234 ABCD
1234 1234 1234 2 OFF
1234*
A
1