Omron CP1H CPU Operation Manual page 177

Cp1h cpu unit
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Overview of I/O Memory Area
Area
TR Area
16 bits
Data Memory Area
32,768
words
Timer Completion Flags
4,096 bits
Counter Completion Flags
4,096 bits
Timer PVs
4,096
words
Counter PVs
4,096
words
Task Flag Area
32 bits
Index Registers
16 regis-
ters
Data Registers
16 regis-
ters
Note
Size
Range
Task usage
TR0 to
Shared by
TR15
all tasks
D00000
to
D32767
T0000 to
T4095
C0000 to
C4095
T0000 to
T4095
C0000 to
C4095
TK0 to
TK31
IR0 to
Function
IR15
separately in
each task
(Note 3)
DR0 to
DR15
1. H512 to H1535 are used as a Function Block Holding Area. These words
can be used only for function block instances (internally allocated variable
area).
2. Bits can be manipulated using TST(350), TSTN(351), SET, SETB(532),
RSTB(533), and OUTB(534).
3. Index registers and data registers can be used either individually by task
or they can be shared by all the tasks (the default is individual use by task).
4. Timer PVs can be refreshed indirectly by force-setting/resetting the Timer
Completion Flags.
5. Counter PVs can be refreshed indirectly by force-setting/resetting the
Counter Completion Flags.
Allocation
Bit
Word
access
access
---
OK
OK
---
No
OK
(Note
2)
---
OK
---
---
OK
---
---
---
OK
---
---
OK
---
OK
---
---
OK
OK
---
No
OK
Section 4-1
Access
Change
from CX-
Read
Write
Programmer
OK
OK
No
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
No
No
Indirect
Specific
No
address-
instruc-
ing only
tions only
OK
OK
No
Forcing
bit
status
No
No
OK
OK
No
(Note 4)
No
(Note 5)
No
No
No
143

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