Counter Area (C) - Omron CP1H CPU Operation Manual

Cp1h cpu unit

Hide thumbs Also See for CP1H CPU:

Table of Contents

Timers and Counters

4-13-2 Counter Area (C)

Instruction name

CNT/CNTX(546)

CNTR(012)/CNTRX(548)

COUNTER WAIT:

CNTW(814)/CNTWX(818)

Forcing Bit Status

Restrictions

The 4,096 counter numbers (C0000 to C4095) are shared by the CNT,

CNTX(546), CNTR(012), CNTRX(548), CNTW(814), and CNTWX(818)

instructions. Counter Completion Flags and present values (PVs) for these

instructions are accessed with the counter numbers.

When a counter number is used in an operand that requires bit data, the

counter number accesses the Completion Flag of the counter. When a

counter number is used in an operand that requires word data, the counter

number accesses the PV of the counter.

The refresh method for counter PVs can be set from the CX-Programmer to

either BCD or binary. (Refer to the previous page).

It is not recommended to use the same counter number in two counter

instructions because the counters will not operate correctly if they are count-

ing simultaneously. If two or more counter instructions use the same counter

number, an error will be generated during the program check, but the counters

will operate as long as the instructions are not executed in the same cycle.

The following table shows when counter PVs and Completion Flags will be

Counter Completion Flags can be force-set and force-reset.

Counter PVs cannot be force-set or force-reset, although the PVs can be

refreshed indirectly by force-setting/resetting the Completion Flag.

There are no restrictions in the order of using counter numbers or in the num-

ber of N.C. or N.O. conditions that can be programmed. Counter PVs can be

read as word data and used in programming.

Effect on PV and Completion Flag

Section 4-13

Table of Contents