Omron CP1H CPU Operation Manual page 187

I/O Area and I/O Allocations
Unit
Unit with 8 inputs CP1W-8ED
CPM1A-8ED
Unit with Relays CP1W-8ER
8 outputs CPM1A-8ER
Sinking CP1W-8ET
transistors CPM1A-8ET
Sourcing CP1W-8ET1
transistors CPM1A-8ET1
Unit with Relays CP1W-16ER
16 out- CPM1A-16ER
puts
Sinking CP1W-16ET
transistors
Sourcing CP1W-16ET1
transistors
Unit with Relays CP1W-20EDR1
20 I/O CPM1A-20EDR1
Sinking CP1W-20EDT
transistors CPM1A-20EDT
Sourcing CP1W-20EDT1
transistors CPM1A-20EDT1
Unit Relays CP1W-32ER
with 32
outputs
Sinking CP1W-32ET
transistors
Sourcing CP1W-32ET1
transistors
Unit with Relays CP1W-40EDR
40 I/O CPM1A-40EDR
Sinking CP1W-40EDT
transistors CPM1A-40EDT
Sourcing CP1W-40EDT1
transistors CPM1A-40EDT1
I/O Unit, or CPU Unit are automatically allocated. This word is indicated as
"CIO m" for input words and as "CIO n" for output words.
Input bits
No. of No. of
bits words
8 bits 1 word
--- None
--- None
--- None
--- None
--- None
--- None
12 bits 1 word
12 bits 1 word
12 bits 1 word
--- None
--- None
--- None
24 bits 2 words CIO m (bits 00 to 11)
24 bits 2 words CIO m (bits 00 to 11)
24 bits 2 words CIO m (bits 00 to 11)
■ I/O Bit Addresses
Units 8 Input Points (CP1W-8ED/CPM1A-8ED)
Eight input bits are allocated in one word (bits 00 to 07 in CIO m).
15 14 13
Inputs
m
Only one word (8 bits) is allocated to an 8-input Expansion Input Unit. No out-
put words are allocated. Input bits 08 to 15 are always cleared by the system
and cannot be used as work bits.
Units with 8 Output Points (CP1W-8E@@/CPM1A-8E@@)
Eight output bits are allocated in one word (bits 00 to 07 in CIO n+1).
15 14
Outputs n
Only one word (8 bits) is allocated to an 8-output Expansion Output Unit. No
input words are allocated. Output bits 08 to 15 can be used as work bits.
Addresses No. of
bits
CIO m (bits 00 to 07) ---
None 8 bits
None 8 bits
None 8 bits
None 16 bits 2 words CIO n (bits 00 to 07)
None 16 bits 2 words CIO n (bits 00 to 07)
None 16 bits 2 words CIO n (bits 00 to 07)
CIO m (bits 00 to 11) 8 bits
CIO m (bits 00 to 11) 8 bits
CIO m (bits 00 to 11) 8 bits
None 32 bits 4 words CIO n (bits 00 to 07)
None 32 bits 4 words CIO n (bits 00 to 07)
None 32 bits 4 words CIO n (bits 00 to 07)
16 bits 2 words CIO n (bits 00 to 07)
CIO m+1 (bits 00 to 11)
16 bits 2 words CIO n (bits 00 to 07)
CIO m+1 (bits 00 to 11)
16 bits 2 words CIO n (bits 00 to 07)
CIO m+1 (bits 00 to 11)
12 11 10 09 08
Do not use.
13 12 11 10 09 08
Can be used as work bits.
Section 4-2
Output bits
No. of Addresses
words
None None
1 word CIO n (bits 00 to 07)
1 word CIO n (bits 00 to 07)
1 word CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
1 word CIO n (bits 00 to 07)
1 word CIO n (bits 00 to 07)
1 word CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+2 (bits 00 to 07)
CIO n+3 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+2 (bits 00 to 07)
CIO n+3 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+2 (bits 00 to 07)
CIO n+3 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+1 (bits 00 to 07)
07 06 05 04 03 02
07 06 05 04 03 02
01 00
01 00
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