Page 1 Cat. No. W483-E1-03 SYSMAC CP Series CP1E-E@@D@-@ CP1E-N@@D@-@ CP1E-NA@@D@-@ CP1E CPU Unit INSTRUCTIONS REFERENCE MANUAL...
Page 2 OMRON. No patent liability is assumed with respect to the use of the information contained herein. Moreover, because OMRON is con- stantly striving to improve its high-quality products, the information contained in this manual is subject to change without notice.
Page 3 SYSMAC CP Series CP1E-E@@D@-@ CP1E-N@@D@-@ CP1E-NA@@D@-@ CP1E CPU Unit Instructions Reference Manual Revised December 2009...
Page 4: Introduction
Introduction Thank you for purchasing a SYSMAC CP-series CP1E Programmable Controller. This manual contains information required to use the CP1E. Read this manual completely and be sure you understand the contents before attempting to use the CP1E. Intended Audience This manual is intended for the following personnel, who must also have knowledge of electrical sys- tems (an electrical engineer or the equivalent).
Page 5: Cp1E Cpu Unit Manuals
CP1E CPU Unit Manuals Information on the CP1E CPU Units is provided in the following manuals. Refer to the appropriate manual for the information that is required. This Manual CP1E CPU Unit Hardware CP1E CPU Unit Instructions CP1E CPU Unit Software User’s Manual(Cat.
Page 6: Section 1 Summary Of Instructions
Manual Configuration The CP1E CPU manuals are organized in the sections listed in the following tables. Refer to the appro- priate section in the manuals as required. CP1E CPU Unit Instructions Reference Manual (Cat. No. W483) (This Manual) Section Contents Section 1 Summary of Instructions This section provides a summary of instructions used with a CP1E CPU Unit.
Page 7 Section Contents Section 15 Analog I/O Function This section describes the built-in analog function for NA-type CPU Units. Section 16 Built-in Functions This section describes PID temperature control, clock functions, DM backup functions, security functions. Section 17 Operating the Program- This section describes basic functions of the CX-Programmer, such as ming Device using the CX-Programmer to write ladder programs to control the CP1E...
Page 8: Manual Structure
Manual Structure Page Structure and Icons The following page structure and icons are used in this manual. Level 1 heading 5 Installation and wiring Level 2 heading Level 3 heading Installation Level 2 heading Gives the current headings. Level 3 heading 5-2-1 Installation Location DIN Track Installation...
Page 9: Terminology And Notation
Terminology and Notation Term Description E-type CPU Unit A basic model of CPU Unit that support basic control applications using instructions such as basic, movement, arithmetic, and comparison instructions. Basic models of CPU Units are called “E-type CPU Units” in this manual. N-type CPU Unit An application model of CPU Unit that supports connections to Programmable Terminals, inverters, and servo drives.
Page 10 Sections in this Manual Summary of Instructions Instructions Instruction Execution Times and Number of Steps Monitoring and Computing the Cycle Time Appendices CP1E CPU Unit Instructions Reference Manual(W483)
Page 11: Table Of Contents
CONTENTS Introduction ....................... 1 CP1E CPU Unit Manuals ...................2 Manual Structure ....................... 5 Safety Precautions ....................15 Precautions for Safe Use ..................18 Regulations and Standards..................19 Related Manuals ...................... 20 Section 1 Summary of Instructions ..........1-1 Summary of Instructions ......................1-2 Section 2 Instructions ..............
Page 12 CNTR/CNTRX ............................2-83 CNR/CNRX .............................. 2-86 Comparison Instructions ......................2-88 =, <>, <, <=, >, >= ............................ 2-88 =DT, <>DT, <DT, <=DT, >DT, >=DT ......................2-91 CMP/CMPL .............................. 2-95 CPS/CPSL ............................... 2-98 TCMP ..............................2-101 BCMP ..............................2-103 ZCP/ZCPL ............................. 2-105 Data Movement Instructions.......................
Page 13 XORW/XORL ............................2-214 COM/COML ............................2-216 Special Math Instructions ......................2-218 APR ................................ 2-218 BCNT ..............................2-227 Floating-point Math Instructions ....................2-229 FIX/FIXL ..............................2-233 FLT/FLTL ..............................2-235 +F, –F, *F, /F ............................2-237 =F, <>F, <F, <=F, >F, >=F ........................2-241 FSTR ..............................
Page 14 Other Instructions........................2-398 STC/CLC ............................... 2-398 WDT ..............................2-399 Section 3 Instruction Execution Times and Number of Steps ... 3-1 CP1E CPU Unit Instruction Execution Times and Number of Steps ........3-2 Section 4 Monitoring and Computing the Cycle Time....4-1 Monitoring the Cycle Time......................
Page 15 WHETHER SUCH CLAIM IS BASED ON CONTRACT, WARRANTY, NEGLIGENCE, OR STRICT LIABILITY. In no event shall the responsibility of OMRON for any act exceed the individual price of the product on which liability is asserted. IN NO EVENT SHALL OMRON BE RESPONSIBLE FOR WARRANTY, REPAIR, OR OTHER CLAIMS REGARDING THE PRODUCTS UNLESS OMRON’S ANALYSIS CONFIRMS THAT THE PRODUCTS...
Page 16 Application Considerations SUITABILITY FOR USE OMRON shall not be responsible for conformity with any standards, codes, or regulations that apply to the combination of products in the customer’s application or use of the products. At the customer’s request, OMRON will provide applicable third party certification documents identifying ratings and limitations of use that apply to the products.
Page 17 Performance data given in this manual is provided as a guide for the user in determining suitability and does not constitute a warranty. It may represent the result of OMRON’s test conditions, and the users must correlate it to actual application requirements. Actual performance is subject to the OMRON Warranty and Limitations of Liability.
Page 18: Safety Precautions
Safety Precautions Definition of Precautionary Information The following notation is used in this manual to provide precautions required to ensure safe usage of a CP-series PLC. The safety precautions that are provided are extremely important to safety. Always read and heed the information provided in all safety precautions. Indicates an imminently hazardous situation which, WARNING if not avoided, will result in death or serious injury.
Page 19 Caution Caution Be sure to sufficiently confirm the safety at the destination when you transfer the program or I/O memory or perform procedures to change the I/O memory. Devices connected to PLC outputs may incorrectly operate regardless of the operat- ing mode of the CPU Unit.
Page 20 Caution Program so that the memory area of the start address is not exceeded when using a word address or symbol for the offset. For example, write the program so that processing is executed only when the indirect specification does not cause the final address to exceed the memory area by using an input comparison instruction or other instruction.
Page 21 Precautions for Safe Use Observe the following precautions when using a CP-series PLC. Handling • To initialize the DM Area, back up the initial contents for the DM Area to backup memory using one of the following methods. • Set the number of words of the DM Area to be backed up starting with D0 in the Number of CH of DM for backup Box in the Startup Data Read Area.
Page 22: Regulations And Standards
Regulations and Standards Trademarks SYSMAC is a registered trademark for Programmable Controllers made by OMRON Corporation. CX-One is a registered trademark for Programming Software made by OMRON Corporation. Windows is a registered trademark of Microsoft Corporation. Other system names and product names in this document are the trademarks or registered trademarks of their respective companies.
Page 23: Related Manuals
The following manuals are related to the CP1E. Use them together with this manual. Manual name Cat. No. Model numbers Application Contents SYSMAC CP Series W483 CP1E-E To learn program- Describes each programming instruction in CP1E CPU Unit Instruc- ming instructions in detail.
Page 25: Summary Of Instructions
Summary of Instructions This section provides a summary of instructions used with a CP1E CPU Unit. 1-1 Summary of Instructions ........1-2 CP1E CPU Unit Instructions Reference Manual(W483)
Page 26: Summary Of Instructions
1 Summary of Instructions Summary of Instructions There are 200 types of instructions can be used by CP1E. The following table lists the instructions by function. Refer to the reference pages for the detail of each instruction. Instrucion Instruction Mnemonic Function Page Type...
Page 27 1 Summary of Instructions Instrucion Instruction Mnemonic Function Page Type Sequence OUTPUT Outputs the result (execution condition) of the logical processing to the speci- 2-18 Output fied bit. !OUT Instructions OUTPUT NOT OUT NOT Reverses the result (execution condition) of the logical processing, and outputs 2-18 it to the specified bit.
Page 28: Instructions
1 Summary of Instructions Instrucion Instruction Mnemonic Function Page Type Sequence Indicates the end of a program. 2-38 Control NO OPERATION This instruction has no function. (No processing is performed for NOP(000).) 2-39 Instructions INTERLOCK Interlocks all outputs between IL(002) and ILC(003) when the execution condi- 2-40 tion for IL(002) is OFF.
Page 29 1 Summary of Instructions Instrucion Instruction Mnemonic Function Page Type Comparison Symbol Comparison = , <> , < , <= , Symbol comparison instructions compare two values and create an ON execu- 2-88 ∼ Instructions > , >= tion condition when the comparison condition is true. Time Comparison LD, AND, Time comparison instructions compare two BCD time values and create an ON...
Page 30 1 Summary of Instructions Instrucion Instruction Mnemonic Function Page Type Data Shift SHIFT REGISTER Operates a shift register. 2-127 Instructions REVERSIBLE SFTR/ Creates a shift register that shifts data to either the right or the left. 2-129 SHIFT REGISTER @SFTR WORD SHIFT WSFT/ Shifts data between St and E in word units.
Page 31 1 Summary of Instructions Instrucion Instruction Mnemonic Function Page Type Symbol Math SIGNED BINARY Adds 4-digit (single-word) hexadecimal data and/or constants. 2-158 Instructions ADD WITHOUT CARRY DOUBLE SIGNED Adds 8-digit (double-word) hexadecimal data and/or constants. 2-158 BINARY ADD WITHOUT CARRY SIGNED BINARY Adds 4-digit (single-word) hexadecimal data and/or constants with the Carry 2-160...
Page 32 1 Summary of Instructions Instrucion Instruction Mnemonic Function Page Type Conversion BCD TO BINARY BIN/ Converts BCD data to binary data. 2-185 Instructions @BIN DOUBLE BCD TO BINL/ Converts 8-digit BCD data to 8-digit hexadecimal (32-bit binary) data. 2-185 DOUBLE BINARY @BINL BINARY TO BCD BCD/...
Page 33 1 Summary of Instructions Instrucion Instruction Mnemonic Function Page Type Floating-point FLOATING TO FIX/ Converts a 32-bit floating-point value to 16-bit signed binary data and places 2-233 Math Instruc- 16-BIT @FIX the result in the specified result word. tions FLOATING TO FIXL/ Converts a 32-bit floating-point value to 32-bit signed binary data and places 2-233...
Page 34 1 Summary of Instructions Instrucion Instruction Mnemonic Function Page Type High-speed MODE CONTROL INI/ INI(880) is used to start and stop target value comparison, to change the 2-308 Counter and @INI present value (PV) of a high-speed counter, to change the PV of an interrupt Pulse Output input (counter mode), to change the PV of a pulse output, or to stop pulse out- Instructions...
Page 35 1 Summary of Instructions Instrucion Instruction Mnemonic Function Page Type Other SET CARRY STC/ Sets the Carry Flag (CY). 2-398 Instructions @STC CLEAR CARRY CLC/ Turns OFF the Carry Flag (CY). 2-398 @CLC EXTEND MAXIMUM WDT/ Extends the maximum cycle time, but only for the cycle in which this instruction 2-399 CYCLE TIME @WDT...
Page 36 1 Summary of Instructions 1-12 CP1E CPU Unit Instructions Reference Manual(W483)
Page 37: Section 2 Instructions
Instructions This section describes the functions, operands and sample programs of the instruc- tions that are supported by a CP1E CPU Unit. Notation and Layout of Instruction Descriptions ....2-2 Sequence Input Instructions .
Page 38: Notation And Layout Of Instruction Descriptions
2 Instructions Notation and Layout of Instruction Descriptions Instructions are described in groups by function. Refer to Appendix A List of Instructions by Function Code for a list of instructions by mnemonic that lists the page number in this section for each instruc- tion.
Page 39 2 Instructions Item Contents Flags The flags table indicates the status of the condition flags immediately after execution of the instruction. Any flags that are not listed are not affected by the instruction. “OFF” indicates that a flag is turned OFF immediately after execution of the instruction regardless of the results of executing the instruc- tion.
Page 40: Condition Flags
2 Instructions Condition Flags With the CX-Programmer, the condition flags are registered in advance as global symbols with “P_” in front of the symbol name. Flag CX-Programmer label Error Flag P_ER Access Error Flag P_AER Carry Flag P_CY Greater Than Flag P_GT Equals Flag P_EQ...
Page 41: Sequence Input Instructions
2 Instructions Sequence Input Instructions Differentiated and Immediate Refreshing Instructions • The LOAD, AND, and OR instructions have differentiated and immediate refreshing variations in addi- tion to their ordinary forms, and there are also two combinations available. • The LOAD NOT, AND NOT, OR NOT, OUT, and OUT NOT instructions have immediate refreshing variations in addition to their ordinary forms.
Page 42 2 Instructions Operation Timing for I/O Instructions The following chart shows the differences in the timing of instruction operations for a program config- ured from LD and OUT. Input received Input received Input ↑ received Input ↓ received Input received Input received Input...
Page 43: Ld/Ld Not
2 Instructions LD/LD NOT Function Instruction Mnemonic Variations Function code Indicates a logical start and creates an ON/OFF @LD, %LD, !LD, LOAD execution condition based on the ON/OFF status !@LD, !%LD of the specified operand bit. @LD NOT, %LD Indicates a logical start and creates an ON/OFF NOT, ! LD NOT, LOAD NOT LD NOT...
Page 44 2 Instructions Hint • LD/LD NOT is used in the following circumstances as an instruction for indicating a logical start. 1. When directly connecting to the bus bar. 2. When logic blocks are connected by AND LD or OR LD, i.e., at the beginning of a logic block. The AND LOAD and OR LOAD instructions are used to connect in series or in parallel logic blocks beginning with LD or LD NOT.
Page 45: And/And Not
2 Instructions AND/AND NOT Function Instruction Mnemonic Variations Function code @AND, %AND, Takes a logical AND of the status of the specified !AND, !@AND, operand bit and the current execution condition. !%AND @AND NOT, %AND NOT, Reverses the status of the specified operand bit AND NOT AND NOT !AND NOT,...
Page 46 2 Instructions Precautions • Differentiate up (@) or differentiate down (%) can be specified for AND. If differentiate up (@) is spec- ified, the execution condition is turned ON for one cycle only after the status of the operand bit goes from OFF to ON.
Page 47: Or/Or Not
2 Instructions OR/OR NOT Function Instruction Mnemonic Variations Function code @OR, %OR, Takes a logical OR of the ON/OFF status of the !OR, !@OR, specified operand bit and the current execution !%OR condition. @OR NOT, %OR NOT, !OR NOT, Reverses the status of the specified bit and takes OR NOT OR NOT !@OR NOT,...
Page 48 2 Instructions Precautions • Differentiate up (@) or differentiate down (%) can be specified for OR. If differentiate up (@) is speci- fied, the execution condition is turned ON for one cycle only after the status of the operand bit goes from OFF to ON.
Page 49: And Ld/Or Ld
2 Instructions AND LD/OR LD Function Instruction Mnemonic Variations Function code AND LOAD AND LD Takes a logical AND between logic blocks. OR LOAD OR LD Takes a logical OR between logic blocks. AND LD OR LD Logic block Symbol Logic block Logic block Logic block...
Page 50 2 Instructions Precautions When a logic block is connected by AND LOAD or OR LOAD instructions, the total number of AND LOAD/OR LOAD instructions must match the total number of LOAD/LOAD NOT instructions minus 1. If they do not match, a programming error will occur. AND LD In the following diagram, the two logic blocks are indicated by dotted lines.
Page 51 2 Instructions Sample program AND LD Coding Example (1) Coding Example (2) 100.00 0.00 0.02 0.04 Instruction Operand Instruction Operand 0.01 0.03 0.05 0.00 0.00 OR NOT 0.01 OR NOT 0.01 LD NOT 0.02 LD NOT 0.02 0.03 0.03 AND LD 0.04 0.04 0.05...
Page 52: Not
2 Instructions Function Instruction Mnemonic Variations Function code Reverses the execution condition. Symbol NOT(520) Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Flags There are no flags affected by NOT(520). Function NOT(520) is placed between an execution condition and another instruction to invert the execution con- dition.
Page 53: Up/Down
2 Instructions UP/DOWN Function Instruction Mnemonic Variations Function code UP(521) turns ON the execution condition for the CONDITION ON next instruction for one cycle when the execution condition it receives goes from OFF to ON. DOWN(522) turns ON the execution condition for CONDITION OFF DOWN the next instruction for one cycle when the execu-...
Page 54: Sequence Output Instructions
2 Instructions Sequence Output Instructions OUT/OUT NOT Function Instruction Mnemonic Variations Function code Outputs the result (execution condition) of the OUTPUT !OUT logical processing to the specified bit. Reverses the result (execution condition) of the OUTPUT NOT OUT NOT !OUT NOT logical processing, and outputs it to the specified bit.
Page 55 2 Instructions Hint • Immediate refreshing (!) can be specified for OUT and OUT NOT. An immediate refresh instruction updates the status of the built-in output terminal just after the instruction is executed for the CPU Unit, at the same time as it writes the status of the execution condition (power flow) to the specified output bit in I/O memory.
Page 56 2 Instructions Function Instruction Mnemonic Variations Function code TR bits are used to temporarily retain the ON/OFF TR Bits status of execution conditions in a program when programming in mnemonic code. Function TR bits are used to temporarily retain the ON/OFF status of execution conditions in a program when programming in mnemonic code.
Page 57: Keep
2 Instructions KEEP Function Instruction Mnemonic Variations Function code KEEP KEEP !KEEP Operates like a latching relay. KEEP S(SET) Symbol KEEP(011) R(RESET) Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand Description Data type Size BOOL Operand Specifications Word addresses Indirect DM addresses...
Page 58 2 Instructions Hint • KEEP(011) has an immediate refreshing variation (!KEEP(011)). When a CPU Unit built-in output bit has been specified for R in a !KEEP(011) instruction, any changes to R will be refreshed when !KEEP(011) is executed and reflected immediately in the output bit. •...
Page 59 2 Instructions • If a holding bit is used for R, the bit status will be retained even during a power interruption. KEEP(011) can thus be used to program bits that will maintain status after restarting the PLC follow- ing a power interruption. An example of this that can be used to produce a warning display following a system shutdown for an emergency situation is shown below.
Page 60 2 Instructions Sample program When CIO 0.00 goes ON in the left example, CIO 100.00 0.00 KEEP is turned ON. CIO 100.00 remains ON until CIO 0.01 100.00 goes ON. When CIO 0.02 goes ON and CIO 0.03 goes OFF in the 0.01 left example, CIO 100.01 is turned ON.
Page 61: Difu
2 Instructions DIFU Function Instruction Mnemonic Variations Function code DIFU(013) turns the designated bit ON for one DIFFERENTIATE UP DIFU !DIFU cycle when the execution condition goes from OFF to ON (rising edge). DIFU Symbol DIFU(013) R: Bit Applicable Program Areas Area Step program areas Subroutines...
Page 62 2 Instructions Precautions • The operation of DIFU(013) depends on the execution condition for the instruction itself as well as the execution condition for the program section when it is programmed in an interlocked program section, a jumped program section, or a subroutine. •...
Page 63: Difd
2 Instructions DIFD Function Instruction Mnemonic Variations Function code DIFD(014) turns the designated bit ON for one DIFFERENTIATE DOWN DIFD !DIFD cycle when the execution condition goes from ON to OFF (falling edge). DIFD Symbol DIFD(014) R: Bit Applicable Program Areas Area Step program areas Subroutines...
Page 64 2 Instructions Precautions • The operation of DIFD(014) will not be consistent if the same function block instance is executed more than once in the same cycle. • An subroutine will not be executed while the input condition for the subroutine is OFF. Caution is thus required when using DIFD(014) in a function block definition.
Page 65: Set/Rset
2 Instructions SET/RSET Function Instruction Mnemonic Variations Function code SET turns the operand bit ON when the execution @SET, %SET, !SET, condition is ON. After this, the specified contact !@SET, !%SET will remain ON regardless of ON/OFF of the input condition.
Page 66 2 Instructions Hint • Differences between OUT/OUT NOT and SET/RSET The operation of SET differs from that of OUT because the OUT instruction turns the operand bit OFF when its execution condition is OFF. Likewise, RSET differs from OUT NOT because OUT NOT turns the operand bit ON when its execution condition is OFF.
Page 67: Seta/Rsta
2 Instructions SETA/RSTA Function Instruction Mnemonic Variations Function code SETA(530) turns ON the specified number of MULTIPLE BIT SET SETA @SETA consecutive bits. RSTA(531) turns OFF the specified number of MULTIPLE BIT RESET RSTA @RSTA consecutive bits. SETA RSTA SETA(530) RSTA(531) D: Beginning word Symbol...
Page 68 2 Instructions RSTA RSTA(531) turns OFF N2 bits, beginning from bit N1 of D, and continuing to the left N2 bits are (more-significant bits). All other bits are reset to 0 (OFF). left unchanged. (No changes will be made if N2 is set to 0.) Bits turned OFF by RSTA(531) can be turned ON by any other instructions, not just SETA(530).
Page 69: Setb/Rstb
2 Instructions SETB/RSTB Function Instruction Mnemonic Variations Function code @SETB, !SETB, SINGLE BIT SET SETB SETB(532) turns ON the specified bit. !@SETB @RSTB, !RSTB, SINGLE BIT RESET RSTB RSTB(533) turns OFF the specified bit. !@RSTB SETB RSTB SETB(532) RSTB(533) Symbol D: Word address D: Word address N: Bit number...
Page 70 2 Instructions RSTB RSTB(533) turns OFF bit N of word D when the execution condition is ON. The This bit is turned OFF. status of the bit is not affected when the execution condition OFF. (Use SETB(532) to turn ON the bit.) Execution condition Bit N of word D Hint...
Page 71: Sequence Control Instructions
2 Instructions Sequence Control Instructions Overview of Interlock Instructions Interlock Instructions The following instruction combinations can be used to interlock outputs in a program section. • INTERLOCK and INTERLOCK CLEAR (IL(002) and IL(003)) • MULTI-INTERLOCK DIFFERENTIATION HOLD and MULTI-INTERLOCK CLEAR (MILH(517) and MILC(519))* Note MILH(517) holds the status of the Differentiation Flag, so differentiated instructions that were interlocked are executed after the interlock is cleared.
Page 72 2 Instructions Differences between MILH(517) and MILR(518) Differentiated instructions (DIFU, DIFD, or instructions with a @ or % prefix) operate differently in inter- locks created with MILH(517) and MILR(518). The operation of differentiated instructions in an interlock created with MILH(517) is identical to the operation in an interlock created with IL(002).
Page 73 2 Instructions Differences between Interlocks and Jumps The following table shows the differences between interlocks (created with IL(002)/ILC(003), MILH(517)/MILC(519), or MILR(518)/MILC(519)) and jumps created with JMP(004)/JME(005). Treatment in IL(002)/ILC(003), Treatment in Item MILH(517)/MILC (519), or JMP(004)/JME(005) MILR(518)/MILC (519) Instruction execution Except OUT, OUT NOT, and timer No instructions are executed.
Page 74: End
2 Instructions Function Instruction Mnemonic Variations Function code Indicates the end of a program. Symbol END(001) Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Not allowed Not allowed Flags There are no flags affected by this instruction. Function END(001) completes the execution of a program for that cycle.
Page 75: Nop
2 Instructions Function Instruction Mnemonic Variations Function code NO OPERATION This instruction has no function. Symbol (There is no ladder symbol associated with NOP(000).) Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Flags No flags are affected by NOP(000). Function •...
Page 76: Il/Ilc
2 Instructions IL/ILC Function Instruction Mnemonic Variations Function code Interlocks all outputs between IL(002) and INTERLOCK ILC(003) when the execution condition for IL(002) is OFF. INTERLOCK CLEAR Indicates the end of the interlock range. Symbol ILC(003) IL(002) Applicable Program Areas Area Step program areas Subroutines...
Page 77 2 Instructions Hint • If there are bits which you want to remain ON in an interlocked program section, set these bits to ON with SET just before IL(002). • It is often more efficient to switch a program section with IL(002) and ILC(003). When several processes are controlled with the same execution condition, it takes fewer program steps to put these processes...
Page 78 2 Instructions Operation of Differentiated Instructions If there is a differentiated instruction (DIFU, DIFD, or instruction prefixed by @ or %) between IL(002) and ILC(003) instructions, that instruction will be executed when the interlock is cleared if the differenti- ation condition of the instruction is satisfied by means of a change in the input condition between start- ing and clearing of the interlock.
Page 79 2 Instructions Sample program When CIO 0.00 is OFF in the right example, all outputs between IL(002) and ILC(003) are interlocked. When 0.00 0.00 ON 0.00 OFF CIO 0.00 is ON in the right example, the instructions between IL(002) and ILC(003) are executed normally.
Page 80: Milh/Milr/Milc
2 Instructions MILH/MILR/MILC Function Instruction Mnemonic Variations Function code Interlocks all outputs between MILH(517) and MULTI-INTERLOCK DIFFER- MILH MILC(519) when the execution condition for ENTIATION HOLD MILH(517) is OFF. Interlocks all outputs between MILR(518) and MULTI-INTERLOCK DIFFER- MILR MILC(519) when the execution condition for ENTIATION RELEASE MILR(518) is OFF.
Page 81 2 Instructions Function When the execution condition for MILH(517) (or MILR(518)) with interlock number N is OFF, the outputs for all instructions between that MILH(517)/MILR(518) instruction and the next MILC(519) with interlock number N are interlocked. When the execution condition for MILH(517) (or MILR(518)) with interlock number N is ON, the instruc- tions between that MILH(517)/MILR(518) instruction and the next MILC(519) with interlock number N are executed normally.
Page 82 2 Instructions • A1 and A2 are interlocked when the Global interlock (Emergency stop) Emergency Stop Button is ON. When the Emergency Stop is ON (input MILH • A2 is interlocked when Conveyor condition OFF), both A1 and A2 are interlocked.
Page 83 2 Instructions Differences between MILH(517) and MILR(518) Differentiated instructions (DIFU, DIFD, or instructions with a @ or % prefix) operate differently in inter- locks created with MILH(517) and MILR(518). When a program section is interlocked with MILR(518), a differentiated instruction will not be executed when the interlock is cleared even if the differentiation condition was activated during the interlock (comparing the status of the execution condition when the interlock started to its status when the inter- lock was cleared).
Page 84 2 Instructions Operation of Differentiated Instructions in an MILR(518) Interlock If there is a differentiated instruction (DIFU, DIFD, or instruction with a @ or % prefix) between MILR(518) and the corresponding MILC(519), that instruction will not be executed after the interlock is cleared even if the differentiation condition of the instruction was established.
Page 85 2 Instructions Hint • The cycle time is not shortened when a section of the program is interlocked by MILH(517) or MILR(518) because the interlocked instructions are executed internally. • When nesting interlocks, assign interlock numbers so that the nested program section does not exceed the outer program section.
Page 86 2 Instructions • If there is an ILC(003) instruction between MILR When input condition “a” is OFF, program an MILR(518) and MILC(519) pair, the sections A1 and A2 are interlocked. ILC(003) instruction will be ignored and the full program section between MILR(518) and MILC(519) will be interlocked.
Page 87 2 Instructions • Program operation can be switched more efficiently by using interlocks with MILH(517) or MILR(518). Instead of switching processing with compound conditions, insert an MILH(517) or MILR(518) instruction before each process and an MILC(519) instruction after each process. MILH MILH MILC...
Page 88 2 Instructions Sample program When W0.00 and W0.01 are both ON, the instructions between MILH(517) with interlock number 0 and MILC(519) with interlock number 0 are executed normally. When W0.00 is OFF, the instructions between MILH(517) with interlock number 0 and MILC(519) with interlock number 0 are interlocked.
Page 89: Jmp/Cjp/Jme
2 Instructions JMP/CJP/JME Function Instruction Mnemonic Variations Function code When the execution condition for JMP(004) is OFF, program execution jumps directly to the first JUMP JME(005) in the program with the same jump number. When the execution condition for CJP(510) is ON, program execution jumps directly to the first CONDITIONAL JUMP JME(005) in the program with the same jump...
Page 90 2 Instructions Function Execution condition Instructions When the execution condition for JMP(004) is jumped ON, no jump is made and the program is exe- Instructions in this cuted consecutively as written. section are not executed Instructions and output status is executed When the execution condition for JMP(004) is maintained.
Page 91 2 Instructions • When there are two or more JME(005) instruc- tions with the same jump number, only the instruction with the lower address will be valid. The JME(005) with the higher program Program section A is executed address will be ignored. repeatedly as long as execution condition a is OFF.
Page 92: For/Next
2 Instructions FOR/NEXT Function Instruction Mnemonic Variations Function code The instructions between FOR(512) and NEXT(513) are repeated a specified number of NEXT times. NEXT NEXT(513) FOR(512) Symbol N: Number of loops Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand...
Page 93 2 Instructions Hint There are two ways to repeat a program section until a given execution condition is input. • FOR-NEXT Loop with BREAK Start a FOR-NEXT loop with a maximum of N repetitions. Program BREAK(514) within the loop with the desired execution condition.
Page 94 2 Instructions &3 &3 &3 Escapes from loop when condition a is ON. BREAK Remaining &2 instructions are Breaks FOR-NEXT loop 2. processed as BREAK NEXT NOP(000). NEXT Breaks FOR-NEXT loop 1. BREAK NEXT • A jump instruction such as JMP(004) may be executed within a FOR-NEXT loop, but do not jump beyond the FOR-NEXT loop.
Page 95: Break
2 Instructions BREAK Function Instruction Mnemonic Variations Function code Programmed in a FOR-NEXT loop to cancel the execution of the loop for a given execution condi- BREAK LOOP BREAK tion. The remaining instructions in the loop are processed as NOP(000) instructions. BREAK Symbol BREAK(514)
Page 96: Timer And Counter Instructions
2 Instructions Timer and Counter Instructions Refresh Methods for Timer/Counter PV Overview There are two PV refresh methods for instructions related to timer/counters, “BCD” and “BINARY”. Method Description Setting range Set value Sets the timer set value in BCD. 0~9.999 #0000~9999 Binary Sets the timer set value in BINARY.
Page 97 2 Instructions Operating Mode TIM/TIMX TIMH(015)/ TMHH(540)/ TTIM(087)/ TIML(542)/ Item (550) TIMHX(551) TMHHX(552) TTIMX(555) TIMLX(553) PV = 0 Operating mode change Completion Flag = OFF PV = 0 Power interrupt/reset Completion Flag = OFF Binary: PV = FFFF, Completion Flag = OFF Not applicable Execution of CNR(545)/CNRX(547) BCD: PV = FFFF or 9999, Completion Flag = OFF...
Page 98 2 Instructions Example Timer and Counter Applications Example 1: Long-term Timers The following program examples show three ways to create long-term timers with standard TIM and CNT instructions. 1) Two TIM Instructions In this example, two TIM instructions are combined to make a 30-minute timer. 0.00 (900 seconds) Instruction...
Page 99 2 Instructions Example 2: Two-stage Counter When an SV higher than 9999 is required, two counters can be combined as shown in the following example. In this case, two CNT instructions are combined to make a BCD counter with an SV of 20,000.
Page 100 2 Instructions Example 4: One-shot Bit A TIM timer can be combined with OUT or OUT NOT to control how long a particular bit is ON or OFF. In this example, CIO 2.04 will be ON for 1.5 seconds (the SV of T0001) after CIO 0.00 goes ON. 10.00 0.00 Instruction...
Page 101 2 Instructions 2) Clock Pulse The desired execution condition can be combined with a clock pulse to mimic the clock pulse (0.1 s, 0.2 s, or 1.0 s). 100.06 0.00 P. 1s (1-s clock pulse) Instruction Operands 0.00 100.06 0.00 •...
Page 102: Tim/Timx
2 Instructions TIM/TIMX Function Instruction Mnemonic Variations Function code TIM or TIMX(550) operates a decrementing timer HUNDRED-MS TIMER TIM/TIMX with units of 0.1-s. TIMX Binary TIMX(550) Symbol N: Timer number N:Timer number S: Set value S: Set value Applicable Program Areas Area Step program areas Subroutines...
Page 103 2 Instructions Function • When the timer input is OFF, the timer spec- Timer input ified by N is reset, i.e., the timer’s PV is reset to the SV and its Completion Flag is Timer PV turned OFF. • When the timer input goes from OFF to ON, Completion TIM/TIMX(550) starts decrementing the PV.
Page 104 2 Instructions Condition Completion Flag Operating mode changed from RUN or MONITOR mode to PROGRAM mode or vice versa. Power off and reset Execution of CNR(545)/CNRX(547), the RESET BCD: 9999 Binary: FFFF TIMER/COUNTER instructions Operation in interlocked program Reset to SV. section (IL(002)–ILC(003)) Operation in jumped program section Retains previous...
Page 105: Timh/Timhx
2 Instructions TIMH/TIMHX Function Instruction Mnemonic Variations Function code TIMH TIMH(015)/TIMHX(551) operates a decrementing TEN-MS TIMER timer with units of 10-ms. TIMHX TIMH TIMHX Binary TIMH(015) TIMHX(551) Symbol N: Timer number N: Timer number S: Set value S: Set value Applicable Program Areas Area Step program areas...
Page 106 2 Instructions Function • When the timer input is OFF, the timer specified Timer input by N is reset, i.e., the timer’s PV is reset to the SV and its Completion Flag is turned OFF. Timer PV • When the timer input goes from OFF to ON, TIMH(015)/TIMHX(551) starts decrementing the Completion PV.
Page 107 2 Instructions Condition Completion Flag Operating mode changed from RUN or MONITOR mode to PROGRAM mode or vice versa. Power off and reset Execution of CNR(545)/CNRX(547), the RESET BCD: 9999 Binary: FFFF TIMER/COUNTER instructions Operation in interlocked program Reset to SV. section (IL(002)-ILC(003)) Operation in jumped program section Retains previous...
Page 108: Tmhh/Tmhhx
2 Instructions TMHH/TMHHX Function Instruction Mnemonic Variations Function code TMHH TMHH(540)/TMHHX(552) operates a decrement- ONE-MS TIMER ing timer with units of 1-ms. TMHHX TMHH TMHHX Binary TMHHX(552) TMHH(540) Symbol N: Timer number N: Timer number S: Set value S: Set value Applicable Program Areas Area Step program areas...
Page 109 2 Instructions • The setting range for the set value (SV) is 0 to 9.999 s for TMHH(540) and 0 to 65.535 for TMHHX(552). • The timer accuracy is -0.01 to 0 s. Hint The timer PV and timeup used in TMHH/TMHHX instructions are refreshed at the timing below. Refresh timing Description When each instruction is executed...
Page 110: Ttim/Ttimx
2 Instructions TTIM/TTIMX Function Instruction Mnemonic Variations Function code TTIM TTIM(087)/TTIMX(555) operates an incrementing ACCUMULATIVE TIMER timer with units of 0.1-s. TTIMX TTIM TTIMX Binary Timer input Timer input TTIM(087) TTIMX(555) Symbol N: Timer number N: Timer number Reset input Reset input S: Set value S: Set value...
Page 111 2 Instructions Function • When timer input TTIM(087)/TTIMX(555) increments the PV. Timer input When the timer input goes OFF, the timer will stop incrementing the PV, but the PV will Timer PV retain its value. The PV will resume timing Timing resumes.
Page 112 2 Instructions • When a TTIM(087)/TTIMX(555) timer is forced set, its Completion Flag will be turned ON and its PV will be reset to 0. When a TTIM(087)/TTIMX(555) timer is forced reset, its Completion Flag will be turned OFF and its PV will be reset to 0. The forced set and forced reset operations take priority over the status of the timer and reset inputs.
Page 113: Timl/Timlx
2 Instructions TIML/TIMLX Function Instruction Mnemonic Variations Function code TIML TIML(542)/TIMLX(553) operates a decrementing LONG TIMER timer with units of 0.1s. TIMLX TIML TIMLX Binary TIML(542) TIMLX(553) Symbol D1: Completion Flag D1: Completion Flag D2: PV word D2: PV word S: SV word S: SV word Applicable Program Areas...
Page 114 2 Instructions Function • When the timer input is OFF, the timer is reset, i.e., the timer’s PV is reset to the SV Timer input and its Completion Flag is turned OFF. • When the timer input goes from OFF to ON, Timer PV TIML(542)/TIMLX(553) starts decrementing the PV in D2+1 and D2.
Page 115 2 Instructions Sample program When timer input CIO 0.00 is ON in the following example, the timer PV (in D201 and D200) will be set to the SV (in D101 and D100) and the PV will begin counting down. The timer Completion Flag (CIO 200.00) will be turned ON when the PV reaches 0.
Page 116: Cnt/Cntx
2 Instructions CNT/CNTX Function Instruction Mnemonic Variations Function code CNT/CNTX(546) operates a decrementing COUNTER CNT/CNTX counter. CNTX Binary Count input Count input Symbol CNTX(546) N: Counter number N: Counter number Reset input Reset input S: Set value S: Set value Applicable Program Areas Area Step program areas...
Page 117 2 Instructions Function • The counter PV is decremented by 1 every time that the count input goes from OFF to Count input ON. The Completion Flag is turned ON when the PV reaches 0. Reset input • Once the Completion Flag is turned ON, reset the counter by turning the reset input Counter PV ON or by using the CNR(545)/CNRX(547)
Page 118 2 Instructions • When a CNT/CNTX(546) counter is forced set, its Completion Flag will be turned ON and its PV will be reset to 0000. When a CNT/CNTX(546) counter is forced reset, its Completion Flag will be turned OFF and its PV will be set to the SV. •...
Page 119: Cntr/Cntrx
2 Instructions CNTR/CNTRX Function Instruction Mnemonic Variations Function code CNTR REVERSIBLE COUNTER CNTRX CNTR CNTRX Binary Increment input Increment input CNTR(012) CNTRX(548) Symbol Decrement input Decrement input N: Counter number N: Counter number Reset input Reset input S: Set value S: Set value Applicable Program Areas Area...
Page 120 2 Instructions Function The counter PV is incremented by 1 every time that the increment input goes from OFF to ON and it is decremented by 1 every time Increment input that the decrement input goes from OFF to ON. The PV can fluctuate between 0 and the Decrement input When incrementing, the Completion Flag will be turned ON when the PV is incremented...
Page 121 2 Instructions 0.00 Increment input CNTR Decrement 0001 0.01 input #0003 Increment input 0.02 Reset input 0.00 Decrement input 0.01 Reset input 0.00 Increment input 0.02 CNTRX 0001 Decrement 0.01 input &3 Counter PV C0001 0.02 Reset input Completion Flag C0001 The add and subtract count inputs increase/decrease the count once when the signal rises (OFF to ON).
Page 122: Cnr/Cnrx
2 Instructions CNR/CNRX Function Instruction Mnemonic Variations Function code @CNR Resets the timers or counters within the specified RESET TIMER/COUNTER range of timer or counter numbers. CNRX @CNRX CNRX Binary CNR(545) CNRX(547) Symbol N1: First number in range N1: First number in range N2: Last number in range N2: Last number in range Applicable Program Areas...
Page 123 2 Instructions Precautions • The timer/counter that is reset is as follows. Instructions reset Operation of CNR(545) TIM: HUNDRED-MS TIMER The PV is set to its maximum value (9,999 BCD) and TIMH(015): TEN-MS TIMER the Completion Flag is turned OFF. TMHH(540): ONE-MS TIMER TTIM(087):...
Page 124: Comparison Instructions
2 Instructions Comparison Instructions =, <>, <, <=, >, >= Function Instruction Mnemonic Variations Function code Input comparison instructions compare two values (constants and/or the contents of specified words) and create an ON execution condition when the =, <>, <, <=, >, Input Comparison Instructions 300 to 328 comparison condition is true.
Page 125 2 Instructions Operation Name Label Data length: one-word Data length: double length Less Than Flag P_LT • ON if S < S with one-word data. • ON if S +1, S < S +1, S with double-length data. • OFF in all other cases. •...
Page 126 2 Instructions Function Mnemonic Name Code True if C1 ≤ C2 LD/AND/OR <= LESS THAN OR EQUAL LD/AND/OR<=L DOUBLE LESS THAN OR EQUAL LD/AND/OR <=S SIGNED LESS THAN OR EQUAL LD/AND/OR <=SL DOUBLE SIGNED LESS THAN OR EQUAL True if C1 > C2 LD/AND/OR >...
Page 127: Dt, <>Dt, Dt, >=Dt
2 Instructions =DT, <>DT, <DT, <=DT, >DT, >=DT Function Instruction Mnemonic Variations Function code <>DT Time comparison instructions compare two BCD <DT Time Comparison Instructions time values and create an ON execution condition <=DT when the comparison condition is true. >DT >=DT =DT, <>DT, <DT, <=DT, >DT, >=DT...
Page 128 2 Instructions through S +2: Present Time Data through S +2: Comparison Time Data through S +2 contain the present time through S +2 contain the comparison data. S through S +2 must be in the same time data. S through S +2 must be in the data area.
Page 129 2 Instructions Function The time comparison instruction compares the unmasked values (corresponding bit of C set to 0) of the present time data in S to S +2 with the comparison time data in S to S +2 and creates an ON execu- tion condition when the comparison condition is true.
Page 130 2 Instructions Precautions • Time comparison instructions cannot be used as right-hand instructions, i.e., another instruction must be used between them and the right bus bar. • E-type CP1E CPU Unit (CP1E-E - ) does not have the clock function. The clock data inside the CPU Unit is always 01-01-01 01:01:01.
Page 131: Cmp/Cmpl
2 Instructions CMP/CMPL Function Instruction Mnemonic Variations Function code Compares two unsigned binary values (constants and/or the contents of specified words) and out- COMPARE !CMP puts the result to the Arithmetic Flags in the Auxil- iary Area. Compares two double unsigned binary values (constants and/or the contents of specified words) DOUBLE COMPARE CMPL...
Page 132 2 Instructions The following table shows the status of the Arithmetic Flags after execution of CMP(020). Flag status CMP(020) Result > > = < = < < > > S < S * A status of “---” indicates that the Flag may be ON or OFF. Unsigned binary comparison Arithmetic Flags...
Page 133 2 Instructions Precautions • Using CMP(020)Results in the Program When CMP(020)/CMPL(060) is executed, the result is reflected in the Arithmetic Flags. Control the desired output or right-hand instruction with a branch from the same input condition that controls CMP(020)/CMPL(060), as shown in the following diagram. In this case, the Equals Flag and output A will be turned ON when S or S + 1, S...
Page 134: Cps/Cpsl
2 Instructions CPS/CPSL Function Instruction Mnemonic Variations Function code Compares two signed binary values (constants and/or the contents of specified words) and out- SIGNED BINARY COMPARE !CPS puts the result to the Arithmetic Flags in the Auxil- iary Area. Compares two double signed binary values (con- DOUBLE SIGNED BINARY stants and/or the contents of specified words) and CPSL...
Page 135 2 Instructions The following table shows the status of the Arithmetic Flags after execution of CPS(114). Flag status Result > > = < = < < > > S < S * A status of “---” indicates that the Flag may be ON or OFF. Signed binary comparison Arithmetic Flags...
Page 136 2 Instructions Precautions • When CPS(114)/CPSL(115) is executed, the result is reflected in the Arithmetic Flags. Control the desired output or right-hand instruction with a branch from the same input condition that controls CPS(114)/CPSL(115), as shown in the following diagram. CPS/CPSL Arithmetic Flag (Example: Equal Flag)
Page 137: Tcmp
2 Instructions TCMP Function Instruction Mnemonic Variations Function code Compares the source data to the contents of 16 consecutive words and turns ON the correspond- TABLE COMPARE TCMP @TCMP ing bit in the result word when the contents of the words are equal.
Page 138 2 Instructions Function TCMP(085) compares the source data (S) to each of 1: Data are equal. 0: Data aren’t equal. the 16 words T through T+15 and turns ON the corre- Comparison sponding bit in word R when the data are equal. Bit n of R is turned ON if the content of T+n is equal to S and it is turned OFF if they are not equal.
Page 139: Bcmp
2 Instructions BCMP Function Instruction Mnemonic Variations Function code Compares the source data to 16 ranges (defined by 16 lower limits and 16 upper limits) and turns BLOCK COMPARE BCMP @BCMP ON the corresponding bit in the result word when the source data is within a range.
Page 140 2 Instructions Function BCMP(068) compares the source data (S) to the 16 ranges defined by pairs of lower and upper limit values in B through B+31. The first word in each pair (B+2n) provides the lower limit and the second word (B+2n+1) provides the upper limit of range n (n = 0 to 15).
Page 141: Zcp/Zcpl
2 Instructions ZCP/ZCPL Function Instruction Mnemonic Variations Function code Compares a 16-bit unsigned binary value (CD) with the range defined by lower limit LL and upper AREA RANGE COMPARE limit UL. The results are output to the Arithmetic Flags. Compares a 32-bit unsigned binary value (CD+1, DOUBLE AREA RANGE CD) with the range defined by lower limit (LL+1, ZCPL...
Page 142 2 Instructions Function ZCP(088) compares the 16-bit signed binary data in CD with the range defined by LL and UL and out- puts the result to the Greater Than, Equals, and Less Than Flags in the Auxiliary Area. (The Less Than or Equal, Greater Than or Equal, and Not Equal Flags are left unchanged.) When CD >...
Page 143 2 Instructions • Do not program another instruction between ZCP(088)/ZCPL(116) and the instruction controlled by the Arithmetic Flag because the other instruction might change the status of the Arithmetic Flag. ZCPL Instruction B Arithmetic Flag (Example: Equal Flag) In this case, the results of instruction B might change the results of ZCP(088)/ZCPL(116).
Page 144: Data Movement Instructions
2 Instructions Data Movement Instructions MOV/MOVL/MVN Function Instruction Mnemonic Variations Function code @MOV, !MOV, MOVE Transfers a word of data to the specified word. !@MOV DOUBLE MOVE MOVL @MOVL Transfers two words of data to the specified words. Transfers the complement of a word of data to the MOVE NOT @MVN specified word.
Page 145 2 Instructions Function Transfers S to D. If S is a constant, the value can be used for a data setting. MOVL MOVL(498) transfers S+1 and S to D+1 and D. If S+1 and S are constants, the value can be used for a data setting.
Page 146 2 Instructions When CIO 0.00 is ON in the following example, the content of D101 and D100 are copied to D201 and D200. 0.00 MOVL D100 D200 D100 D200 D101 D201 0.01 #1234 (Hexadecimal 1234) 0.02 +1234 (Decimal 1234) 0.03 -1234 (Decimal -1234) When CIO 0.00 is ON in the following example, the status of the bits in CIO 100 is inverted and the...
Page 147: Movb
2 Instructions MOVB Function Instruction Mnemonic Variations Function code MOVE BIT MOVB @MOVB Transfers the specified bit. MOVB MOVB(082) Symbol S: Source word or data C: Control word D: Destination word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand...
Page 148 2 Instructions Function MOVB(082) copies the specified bit (n) from S to the specified bit (m) in D. Hint The same word can be specified for both S and D to copy a bit within a word. Precautions The other bits in the destination word are left unchanged. Sample program When CIO 0.00 is ON in the following example, the 5 bit of the source word (W0) is copied to the 12...
Page 149: Movd
2 Instructions MOVD Function Instruction Mnemonic Variations Function code Transfers the specified digit or digits. MOVE DIGIT MOVD @MOVD (Each digit is made up of 4 bits.) MOVB MOVD(083) Symbol S: Source word or data C: Control word D: Destination word Applicable Program Areas Area Step program areas...
Page 150 2 Instructions Flags Name Label Operation Error Flag P_ER • ON if one of the first three digits of C is not within the specified range of 0 to 3. • OFF in all other cases. Function MOVB(082) copies the specified bit (n) from S to the specified bit (m) in D.
Page 151: Xfrb
2 Instructions XFRB Function Instruction Mnemonic Variations Function code Transfers the specified number of consecutive MULTIPLE BIT TRANSFER XFRB @XFRB bits. XFRB XFRB(062) Symbol C: Control word S: First source word D: First destination word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage...
Page 152 2 Instructions Function XFRB(062) transfers up to 255 consecutive bits from the source words (beginning with bit l of S) to the destination words (beginning with bit m of D). The beginning bits and number of bits are specified in C, as shown in the following dia- gram.
Page 153: Xfer
2 Instructions XFER Function Instruction Mnemonic Variations Function code Transfers the specified number of consecutive BLOCK TRANSFER XFER @XFER words. XFER XFER(070) Symbol N: Number of words S: First source word D: First destination word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage...
Page 154 2 Instructions Function XFER(070) copies N words beginning with S (S to S+(N-1)) to the N words beginning with D (D to D+(N-1)). N words S+(N-1) D+(N-1) Hint • It is possible for the source words and desti- XFER D100 nation words to overlap, so XFER(070) can &10 D102...
Page 155: Bset
2 Instructions BSET Function Instruction Mnemonic Variations Function code Copies the same word to a range of consecutive BLOCK SET BSET @BSET words. BSET BSET(071) Symbol S: Source word St: Starting word E: End word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage...
Page 156 2 Instructions Function BSET(071) copies the same source word (S) Source word Destination words to all of the destination words in the range St to E. Precautions • Some time will be required to complete BSET(071) when a large number of words is being set. Even if an interrupt occurs, execution of this instruction will not be interrupted and execution of the interrupt task will be started after execution of BSET(071) has been completed.
Page 157: Xchg
2 Instructions XCHG Function Instruction Mnemonic Variations Function code Exchanges the contents of the two specified DATA EXCHANGE XCHG @XCHG words. XCHG XCHG(073) Symbol E1: First exchange word E2: Second exchange word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands...
Page 158 2 Instructions Hint exchange more words, XFER(070) to transfer the words to a third set XFER(070) operation of words (a buffer) as shown in this diagram. Buffer XFER(070) operation XFER(070) operation Sample program When CIO 0.00 is ON in this example, the con- 0.00 tent of D100 is exchanged with the content of XCHG...
Page 159: Dist
2 Instructions DIST Function Instruction Mnemonic Variations Function code Transfers the source word to a destination word SINGLE WORD DISTRIBUTE DIST @DIST calculated by adding an offset value to the base address. DIST DIST(080) Symbol S: Source word Bs: Destination base address Of: Offset Applicable Program Areas Area...
Page 160 2 Instructions Function DIST(080) copies S to the destination word calculated by adding Of to Bs. Bs+n Hint The same DIST(080) instruction can be used to distribute the source word to various words in the data area by changing the value of Of. Precautions Be sure that the offset does not exceed the end of the data area, i.e., Bs and Bs+Of are in the same data area.
Page 161: Coll
2 Instructions COLL Function Instruction Mnemonic Variations Function code Transfers the source word (calculated by adding DATA COLLECT COLL @COLL an offset value to the base address) to the desti- nation word. COLL COLL(081) Symbol Bs: Source base address Of: Offset D: Destination word Applicable Program Areas Area...
Page 162 2 Instructions Function COLL(081) copies the source word (calculated by adding Of to Bs) to the destination word. Bs+n Hint The same COLL(081) instruction can be used to collect data from various source words in the data area by changing the value of Of. Precautions Be sure that the offset does not exceed the end of the data area, i.e., Bs and Bs+Of are in the same data area.
Page 163: Data Shift Instructions
2 Instructions Data Shift Instructions Function Instruction Mnemonic Variations Function code SHIFT REGISTER Operates a shift register. Data input SFT(010) Symbol Shift input St: Starting word Reset input E: End word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand...
Page 164 2 Instructions Precautions • Do not use more than one SFT(010) instructions with overlapping shift words. The results will not be dependable. • St and E must be in the same data area. • The bit data shifted out of the shift register is discarded. •...
Page 165: Sftr
2 Instructions SFTR Function Instruction Mnemonic Variations Function code REVERSIBLE SHIFT REGIS- Creates a shift register that shifts data to either the SFTR @SFTR right or the left. SFTR SFTR(084) Symbol C: Control word St: Starting word E: End word Applicable Program Areas Area Step program areas...
Page 166 2 Instructions Function When the execution condition of the shift input bit (bit 14 of C) 15141312 changes to ON, all the data from St to E is moved in the designated Data input shift direction (designated by bit 12 of C) by 1 bit, and the ON/OFF status of the data input is placed Data input Shift direction...
Page 167: Wsft
2 Instructions WSFT Function Instruction Mnemonic Variations Function code WORD SHIFT WSFT @WSFT Shifts data between St and E in word units. WSFT WSFT(016) S: Source word Symbol St: Starting word E: End word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage...
Page 168 2 Instructions Sample program When CIO 0.00 is ON, data from CIO 100 through CIO 102 will be shifted one word toward E. The con- tents of W0 will be stored in CIO 100 and the contents of CIO 102 will be lost. 0.00 WSFT St: W0...
Page 169: Asl
2 Instructions Function Instruction Mnemonic Variations Function code ARITHMETIC SHIFT LEFT @ASL Shifts the contents of Wd one bit to the left. Symbol ASL(025) Wd: Word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand Description Data type Size Word...
Page 170: Asr
2 Instructions Function Instruction Mnemonic Variations Function code ARITHMETIC SHIFT RIGHT @ASL Shifts the contents of Wd one bit to the right. Symbol ASR(026) Wd: Word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand Description Data type Size Word...
Page 171: Rol
2 Instructions Function Instruction Mnemonic Variations Function code Shifts all Wd bits one bit to the left ROTATE LEFT @ROL including the Carry Flag (CY). Symbol ROL(027) Wd: Word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand Description...
Page 172 2 Instructions Sample program When CIO 0.00 is ON, word CIO 100 and the 0.00 Carry Flag (CY) will shift one bit to the left. The contents of CIO 100.15 will be shifted to the Carry Flag (CY) and the Carry Flag con- tents will be shifted to CIO 100.00.
Page 173: Ror
2 Instructions Function Instruction Mnemonic Variations Function code Shifts all Wd bits one bit to the right ROTATE RIGHT @ROR including the Carry Flag (CY). Symbol ROR(028) Wd: Word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand Description...
Page 174 2 Instructions Sample program When CIO 0.00 is ON, word CIO 100 0.00 and the Carry Flag (CY) will shift one bit to the right. The contents of CIO 100.00 will be shifted to the Carry Flag (CY) and the Carry Flag contents will be shifted to CIO 100.15.
Page 175: Sld/Srd
2 Instructions SLD/SRD Function Instruction Mnemonic Variations Function code ONE DIGIT SHIFT LEFT @SLD Shifts data by one digit (4 bits) to the left. ONE DIGIT SHIFT RIGHT @SRD Shifts data by one digit (4 bits) to the right. SRD(075) SLD(074) Symbol St: Starting Word...
Page 176 2 Instructions Sample program When CIO 0.00 is ON, words CIO 100 through CIO 102 will shift by one digit (4 bits) to the left. A zero will be placed in bits 0 to 3 of word CIO 100 and the contents of bits 12 to 15 of CIO 102 will be lost. 0.00 E: CIO 102 St+1: CIO 101...
Page 177: Nasl/Nsll
2 Instructions NASL/NSLL Function Instruction Mnemonic Variations Function code Shifts the specified 16 bits of word data to the left by the SHIFT N-BITS LEFT NASL @NASL specified number of bits. Shifts the specified 32 bits of word data to the left by the DOUBLE SHIFT N-BITS LEFT NSLL @NSLL...
Page 178 2 Instructions Flags Name Label Operation Error Flag P_ER • ON when the control word C (the number of bits to shift) is not within range. • OFF in all other cases. Equals Flag P_EQ • ON when the shift result is 0. •...
Page 179 2 Instructions Sample program When CIO 0.00 is ON, The contents of CIO 100 is shifted 10 bits to the left (from the rightmost bit to the leftmost bit). The number of bits to shift is specified in bits 0 to 7 of word W0 (control data). The con- tents of bit 0 of CIO 100 is copied into bits from which data was shifted and the contents of the right- most bit which was shifted out of range is shifted into the Carry Flag (CY).
Page 180: Nasr/Nsrl
2 Instructions NASR/NSRL Function Instruction Mnemonic Variations Function code Shifts the specified 16 bits of word data to the right by SHIFT N-BITS RIGHT NASR @NASR the specified number of bits. DOUBLE SHIFT N-BITS Shifts the specified 32 bits of word data to the right by NSRL @NSRL RIGHT...
Page 181 2 Instructions Flags Name Label Operation Error Flag P_ER • ON when the control word C (the number of bits to shift) is not within range. • OFF in all other cases. Equals Flag P_EQ • ON when the shift result is 0. •...
Page 182 2 Instructions Sample program • When CIO 0.00 is ON, CIO 100 will be shifted 10 bits to the right (from the leftmost bit to the right- most bit). The number of bits to shift is specified in bits 0 to 7 of W0. The contents of bit 15 of CIO 100 is copied into the bits from which data was shifted and the contents of the leftmost bit of data which was shifted out of range, is shifted into the Carry Flag (CY).
Page 183: Increment/Decrement Instructions
2 Instructions Increment/Decrement Instructions ++/++L Function Instruction Mnemonic Variations Function code Increments the 4-digit hexadecimal content of the INCREMENT BINARY specified word by 1. DOUBLE INCREMENT Increments the 8-digit hexadecimal content of the @++L BINARY specified words by 1. + +L Symbol ++L(591) ++(590)
Page 184 2 Instructions Function The ++(590) instruction adds 1 to the binary content of Wd. The specified word will be incremented by 1 every cycle as long as the execution condition of ++(590) is ON. When the up-differentiated variation of this instruction (@++(590)) is used, the specified word is incremented only when the execution condi- tion has gone from OFF to ON.
Page 185 2 Instructions Operation of @++(590)/@++L(591) The up-differentiated variation is used in the following example, so the content of D100 will be incre- mented by 1 only when CIO 0.00 has gone from OFF to ON. 0.00 @ ++ Incremented every cycle while CIO 0.00 is ON.
Page 186 2 Instructions --/--L Function Instruction Mnemonic Variations Function code Decrements the 4-digit hexadecimal content of the DECREMENT BINARY specified word by 1. DOUBLE DECREMENT Decrements the 8-digit hexadecimal content of the @--L BINARY specified words by 1. Symbol --(592) --L(593) Wd: Word Wd: First word Applicable Program Areas...
Page 187 2 Instructions Function The --(592) instruction subtracts 1 from the binary content of Wd. The specified word will be decre- mented by 1 every cycle as long as the execution condition of --(592) is ON. When the up-differenti- ated variation of this instruction (@ --(592)) is used, the specified word is decremented only when the execution condition has gone from OFF to ON.
Page 188 2 Instructions Operation of @--(592)/@--L(593) In the following example, the content of D100 will be decremented by 1 every cycle as long as CIO 0.00 is ON. 0.00 @− − Decremented every cycle while CIO 0.00 is ON. D100 Wd: D100 Wd: D100 −1 0 0 2 0...
Page 189: B/++Bl
2 Instructions ++B/++BL Function Instruction Mnemonic Variations Function code Increments the 4-digit BCD content of the speci- INCREMENT BCD @++B fied word by 1. Increments the 8-digit BCD content of the speci- DOUBLE INCREMENT BCD ++BL @++BL fied words by 1. + +BL Symbol ++B(594)
Page 190 2 Instructions Function The ++B(594) instruction adds 1 to the BCD content of Wd. The specified word will be incremented by 1 every cycle as long as the execution condition of ++B(594) is ON. When the up-differentiated variation of this instruction (@++B(594)) is used, the specified word is incremented only when the execution condi- tion has gone from OFF to ON.
Page 191 2 Instructions Operation of @++B(594)/@++BL(595) The up-differentiated variation is used in the following example, so the content of D100 will be incre- mented by 1 only when CIO 0.00 has gone from OFF to ON. 0.00 @ ++B Incremented only for up-differentiation.
Page 192: B/--Bl
2 Instructions --B/--BL Function Instruction Mnemonic Variations Function code Decrements the 4-digit BCD content of the speci- DECREMENT BCD @--B fied word by 1. Decrements the 8-digit BCD content of the speci- DOUBLE DECREMENT BCD --BL @--BL fied words by 1. --BL Symbol --B(596)
Page 193 2 Instructions Sample program Operation of --B(596)/--BL(597) In the following example, the BCD content of D100 will be decremented by 1 every cycle as long as CIO 0.00 is ON. 0.00 Decremented every cycle while CIO 0.00 is ON. D100 Wd: D100 Wd: D100 0 0 2 0...
Page 194: Symbol Math Instructions
2 Instructions Symbol Math Instructions +/+L Function Instruction Mnemonic Variations Function code SIGNED BINARY ADD Adds 4-digit (single-word) hexadecimal data WITHOUT CARRY and/or constants. DOUBLE SIGNED BINARY Adds 8-digit (double-word) hexadecimal data ADD WITHOUT CARRY and/or constants. +(400) +L(401) Au: 1st augend word Au: Augend word Symbol Ad: Addend word...
Page 195 2 Instructions Flags Operation Name Label Error Flag P_ER Equals Flag P_EQ • ON when the result is 0. • ON when the result is 0. • OFF in all other cases. • OFF in all other cases. Carry Flag P_CY •...
Page 196: C/+Cl
2 Instructions +C/+CL Function Instruction Mnemonic Variations Function code SIGNED BINARY ADD WITH Adds 4-digit (single-word) hexadecimal data CARRY and/or constants with the Carry Flag (CY). DOUBLE SIGNED BINARY Adds 8-digit (double-word) hexadecimal data @+CL ADD WITH CARRY and/or constants with the Carry Flag (CY). +C(402) +CL(403) Symbol...
Page 197 2 Instructions Function +C(402) adds the binary values in Au, Ad, and CY and outputs the result to R. (Signed binary) (Signed binary) CY will turn ON (Signed binary) when there is a carry. +CL(403) adds the binary values in Au and Au+1, Ad and Ad+1, and CY and outputs the result to R. Au+1 (Signed binary) (Signed binary)
Page 198: B/+Bl
2 Instructions +B/+BL Function Instruction Mnemonic Variations Function code Adds 4-digit (single-word) BCD data and/or con- BCD ADD WITHOUT CARRY stants. DOUBLE BCD ADD WITHOUT Adds 8-digit (double-word) BCD data and/or con- @+BL CARRY stants. +B(404) +BL(405) Symbol Au: Augend word Au: 1st augend word Ad: Addend word Ad: 1st addend word...
Page 199 2 Instructions Function +B(404) adds the BCD values in Au and Ad and outputs the result to R. (BCD) (BCD) CY will turn ON (BCD) when there is a carry. +BL(405) adds the BCD values in Au and Au+1 and Ad and Ad+1 and outputs the result to R, R+1. Au+1 (BCD) Ad+1...
Page 200: Bc/+Bcl
2 Instructions +BC/+BCL Function Instruction Mnemonic Variations Function code Adds 4-digit (single-word) BCD data and/or con- BCD ADD WITH CARRY @+BC stants with the Carry Flag (CY). DOUBLE BCD ADD WITH Adds 8-digit (double-word) BCD data and/or con- +BCL @+BCL CARRY stants with the Carry Flag (CY).
Page 201 2 Instructions Function +BC(406) adds BCD values in Au, Ad, and CY and outputs the result to R. (BCD) (BCD) CY will turn ON (BCD) when there is a carry. +BCL +BCL(407) adds the BCD values in Au and Au+1, Ad and Ad+1, and CY and outputs the result to R, R+1.
Page 202 2 Instructions –/–L Function Instruction Mnemonic Variations Function code SIGNED BINARY SUBTRACT Subtracts 4-digit (single-word) hexadecimal data – @– WITHOUT CARRY and/or constants. DOUBLE SIGNED BINARY Subtracts 8-digit (double-word) hexadecimal data SUBTRACT WITHOUT –L @–L and/or constants. CARRY – –L -(410) -L(410) Symbol...
Page 203 2 Instructions Function – –(400) subtracts the binary values in Su from Mi and outputs the result to R. When the result is nega- tive, it is output to R as a 2’s complement. (Signed binary) (Signed binary) CY will turn ON (Signed binary) when there is a borrow.
Page 204 2 Instructions Hint • 2’s Complement A 2’s complement is the value obtained by subtracting each binary digit from 1 and adding one to the result. For example, the 2’s complement for 1101 is calculated as follows: 1111 (F hexadecimal) – 1101 (D hexadecimal) + 1 (1 hexadecimal) = 0011 (3 hexadecimal).
Page 205 2 Instructions Subtraction at (1) Mi+1: CIO 201 Mi: CIO 200 Su+1: CIO 121 Su: CIO 120 R+1: D101 R+1: D100 The Carry Flag (CY) is ON, so the result is subtracted from 0000 0000 to obtain the actual number. Subtraction at (2) Su+1: D101 Su: D100...
Page 206: C/-Cl
2 Instructions –C/–CL Function Instruction Mnemonic Variations Function code SIGNED BINARY SUBTRACT Subtracts 4-digit (single-word) hexadecimal data –C @–C WITH CARRY and/or constants with the Carry Flag (CY). DOUBLE SIGNED BINARY Subtracts 8-digit (double-word) hexadecimal data –CL @–CL SUBTRACT WITH CARRY and/or constants with the Carry Flag (CY).
Page 207 2 Instructions Function –C –C(412) subtracts the binary values in Su and CY from Mi, and outputs the result to R. When the result is negative, it is output to R as a 2’s complement. (Signed binary) (Signed binary) – CY will turn ON (Signed binary) when there is a...
Page 208: B/-Bl
2 Instructions –B/–BL Function Instruction Mnemonic Variations Function code BCD SUBTRACT WITHOUT Subtracts 4-digit (single-word) BCD data and/or –B @–B CARRY constants. DOUBLE BCD SUBTRACT Subtracts 8-digit (double-word) BCD data and/or –BL @–BL WITHOUT CARRY constants. –B –BL –BL(415) –B(414) Symbol Mi: 1st minuend word Mi: Minuend word...
Page 209 2 Instructions Function –B –B(414) subtracts the BCD values in Su from Mi and outputs the result to R. If the result of the subtrac- tion is negative, the result is output as a 10’s complement. (BCD) (BCD) CY will turn ON (BCD) when there is a borrow.
Page 210 2 Instructions Subtraction at (1) Mi+1: CIO 201 S1: CIO 200 Su+1: CIO 121 S2: CIO 120 – 09583960+(100000000-17072641) R+1: D101 R+1: D100 The Carry Flag (CY) is ON, so the result is subtracted from 0000 0000. Subtraction at (2) Su+1: D101 Su: D100 –...
Page 211: Bc/-Bcl
2 Instructions –BC/–BCL Function Instruction Mnemonic Variations Function code BCD SUBTRACT WITH Subtracts 4-digit (single-word) BCD data and/or –BC @–BC CARRY constants with the Carry Flag (CY). DOUBLE BCD SUBTRACT Subtracts 8-digit (double-word) BCD data and/or –BCL @–BCL WITH CARRY constants with the Carry Flag (CY).
Page 212 2 Instructions Function –BC –BC(416) subtracts BCD values in Su and CY from Mi and outputs the result to R. If the result is nega- tive, it is output to R as a 10’s complement. (BCD) (BCD) – CY will turn ON (BCD) when there is a borrow.
Page 213 2 Instructions */*L Function Instruction Mnemonic Variations Function code Multiplies 4-digit signed hexadecimal data and/or SIGNED BINARY MULTIPLY constants. DOUBLE SIGNED BINARY Multiplies 8-digit signed hexadecimal data and/or MULTIPLY constants. *L(421) *(420) Symbol Md: 1st multiplicand word Md: Multiplicand word Mr: Multiplier word Mr: 1st multiplier word R: 1st result word...
Page 214 2 Instructions Function *(420) multiplies the signed binary values in Md and Mr and outputs the result to R, R+1. (Signed binary) × (Signed binary) (Signed binary) R + 1 *L(421) multiplies the signed binary values in Md and Md+1 and Mr and Mr+1 and outputs the result to R, R+1, R+2, and R+3.
Page 215: B/*Bl
2 Instructions *B/*BL Function Instruction Mnemonic Variations Function code Multiplies 4-digit (single-word) BCD data and/or BCD MULTIPLY constants. Multiplies 8-digit (double-word) BCD data and/or DOUBLE BCD MULTIPLY @*BL constants. *B(424) *BL(425) Symbol Md: 1st multiplicand word Md: Multiplicand word Mr: 1st multiplier word Mr: Multiplier word R: Result word R: 1st result word...
Page 216 2 Instructions Function *B(424) multiplies the BCD content of Md and Mr and outputs the result to R, R+1. (BCD) × (BCD) R + 1 (BCD) *BL(425) multiplies BCD values in Md and Md+1 and Mr and Mr+1 and outputs the result to R, R+1, R+2, and R+3.
Page 217 2 Instructions /, /L Function Instruction Mnemonic Variations Function code Divides 4-digit (single-word) signed hexadecimal SIGNED BINARY DIVIDE data and/or constants. DOUBLE SIGNED BINARY Divides 8-digit (double-word) signed hexadecimal DIVIDE data and/or constants. /L(431) /(430) Symbol Dd: Dividend word Dd: 1st dividend word Dr: Divisor word Dr: 1st divisor word R: Result word...
Page 218 2 Instructions Function /(430) divides the signed binary (16 bit) values in Dd by those in Dr and outputs the result to R, R+1. The quotient is placed in R and the remainder in R+1. (Signed binary) ÷ (Signed binary) R + 1 (Signed binary) Remainder...
Page 219: B, /Bl
2 Instructions /B, /BL Function Instruction Mnemonic Variations Function code Divides 4-digit (single-word) BCD data and/or con- BCD DIVIDE stants. Divides 8-digit (double-word) BCD data and/or DOUBLE BCD DIVIDE @/BL constants. /BL(435) /B(434) Symbol Dd: Dividend word Dd: 1st dividend word Dr: Divisor word Dr: 1st divisor word R: Result word...
Page 220 2 Instructions Function /B(434) divides the BCD content of Dd by those of Dr and outputs the quotient to R and the remainder to R+1. (BCD) ÷ (BCD) (BCD) R +1 Remainder Quotient /BL(435) divides BCD values in Dd and Dd+1 by those in Dr and Dr+1 and outputs the quotient to R, R+1 and the remainder to R+2, R+3.
Page 221: Conversion Instructions
2 Instructions Conversion Instructions BIN/BINL Function Instruction Mnemonic Variations Function code BCD TO BINARY @BIN Converts BCD data to binary data. DOUBLE BCD TO DOUBLE Converts 8-digit BCD data to 8-digit hexadecimal BINL @BINL BINARY (32-bit binary) data. BINL BIN(023) BINL(058) Symbol S: Source word...
Page 222 2 Instructions Function BIN(023) converts the BCD data in S to binary data (BCD) (BIN) and writes the result to R. The following diagram shows an example BCD-to-binary conversion. ×10 ×10 ×10 ×10 ×16 ×16 ×16 ×16 BINL BINL(058) converts the 8-digit BCD data in S and S+1 to 8-digit hexadecimal (32-bit binary) data and (BCD) (BCD)
Page 223: Bcd/Bcdl
2 Instructions BCD/BCDL Function Instruction Mnemonic Variations Function code Converts a word of binary data to a word of BCD BINARY TO BCD @BCD data. DOUBLE BINARY TO Converts 8-digit hexadecimal (32-bit binary) data BCDL @BCDL to 8-digit BCD data. DOUBLE BCD BCDL BCD(024)
Page 224 2 Instructions Function BCD(024) converts the binary data in S to BCD data (BIN) (BCD) and writes the result to R. The following diagram shows an example BCD-to-binary conversion. ×16 ×16 ×16 ×16 ×10 ×10 ×10 ×10 BCDL BCDL(059) converts the 8-digit hexadecimal (32-bit (BCD) (BCD) (BIN)
Page 225: Neg
2 Instructions Function Instruction Mnemonic Variations Function code Calculates the 2’s complement of a word of hexa- 2’S COMPLEMENT @NEG decimal data. NEG(160) Symbol S: Source word R: Result word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand...
Page 226 2 Instructions Sample program When CIO 0.00 is ON in the following example, NEG(160) calculates the 2’s complement of the content of D100 and writes the result to D200. 0.00 D100 D200 Actual Equivalent calculation subtraction D100 Reverse bit status Add 1 D200 2-190...
Page 227: Mlpx
2 Instructions MLPX Function Instruction Mnemonic Variations Function code Reads the numerical value in the specified digit (or byte) in the source word with 4-to 16 conversion DATA DECODER MLPX @MLPX (or 8-to-256 conversion), turns ON the corre- sponding bit in the result word, and turns OFF all other bits in the result word.
Page 228 2 Instructions 8-to-256 bit conversion S: Source Word R: First Result Word D+15 to D: Decoding result of 1st digit of decoded digits Digit 1 Digit 0 D+31 to D+16: Digits from the starting digit going left are Decoding result of 2nd digit of decoded digits decoded (Returns to digit 0 after digit 1) Note The result words must be in the same data area.
Page 229 2 Instructions 8-to-256 bit Conversion R=1 (Convert 2 bytes.) When the leftmost digit of C is 1, MLPX(076) takes the value of the speci- n=1 (Start with second byte.) fied byte in S (00 to FF) and turns ON the corresponding bit in the range of 16 result words.
Page 230 2 Instructions Sample program 4-to-16 bit Conversion When CIO 0.00 is ON in the following example, MLPX(076) will convert 3 digits in S beginning with digit 1 (the second digit), as indicated by C (#0021). The corresponding bits in D100, D101, and D102 will be turned ON.
Page 231 2 Instructions Example of multi-digit decoding • Example of 4-to-16 bit decoding C: #0010 C: #0030 C: #0031 S Digit 3 Digit 2 Digit 1 Digit 0 Digit 3 Digit 2 Digit 1 Digit 0 Digit 3 Digit 2 Digit 1 Digit 0 •...
Page 232: Dmpx
2 Instructions DMPX Function Instruction Mnemonic Variations Function code FInds the location of the first or last ON bit within the source word with 16-to-4 conversion (or 256- DATA ENCODER DMPX @DMPX to-8 conversion), and writes that value to the spec- ified digit (or byte) in the result word.
Page 233 2 Instructions 256-to-8 bit conversion S: First Source Word R: Result Word S+15 to S: 1st digit of digits to be encoded Digit 1 Digit 0 S+31 to S+16: 2nd digit of digits to be encoded The results of encoding of S to S+15, S+16 to S+31 are stored from the starting digit going left (returns to digit 0 after digit 1).
Page 234 2 Instructions 256-to-8 bit Conversion When the fourth (leftmost) digit of C is 1, DMPX(077) finds the locations of the leftmost (highest bit address) or rightmost (lowest bit address) ON bits in one or two 16-word ranges of source words. The locations of these bits are written to R beginning with the specified byte.
Page 235 2 Instructions Sample program 16-to-4 bit Conversion When CIO 0.00 is ON in the following example, DMPX(077) will find the leftmost ON bits in CIO 100, CIO 101, and CIO 102 and write those locations to 3 digits in R beginning with digit 1 (the second digit), as indicated by C (#0021).
Page 236 2 Instructions 256-to-8 bit Conversion C: #1010 C: #1011 S+15 S+15 S+16 S+16 S+31 S+31 Digit 1 Digit 0 Digit 1 Digit 0 If the conversion data contains 0000 hex, but other data is to be encoded, separate the conversion by using more than one DMPX(077) instructions.
Page 237: Asc
2 Instructions Function Instruction Mnemonic Variations Function code Converts 4-bit hexadecimal digits in the source ASCII CONVERT @ASC word into their 8-bit ASCII equivalents. ASC(086) Symbol S: Source word DI: Digit designator D: First destination word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks...
Page 238 2 Instructions Operand Specifications Word addresses Indirect DM addresses Area Constants Pulse bits TR bits Flags Name Label Operation Error Flag P_ER • ON if the content of Di is not within the specified ranges. • OFF in all other cases. Function ASC(086) treats the contents of S as 4 hexadec- imal digits, converts the designated digit(s) of S...
Page 239 2 Instructions Sample program When CIO 0.00 is ON in the following example, ASC(086) converts three hexadecimal digits in D100 (beginning with digit 1) into their ASCII equivalents and writes this data to D200 and D201 beginning with the leftmost byte in D200. In this case, a digit designator of #0121 specifies no parity, the starting byte (when writing) = leftmost byte, the number of digits to read = 3, and the starting digit (when read- ing) = digit 1.
Page 240 2 Instructions Parity It is possible to specify the parity of the ASCII data for use in error control during data transmissions. The leftmost bit of each ASCII character will be automatically adjusted for even, odd, or no parity. • When no parity (0) is designated, the leftmost bit will always be zero. When even parity (1) is desig- nated, the leftmost bit will be adjusted so that the total number of ON bits is even.
Page 241: Hex
2 Instructions Function Instruction Mnemonic Variations Function code Converts up to 4 bytes of ASCII data in the source ASCII TO HEX @HEX word to their hexadecimal equivalents and writes these digits in the specified destination word. HEX(162) Symbol S: First source word DI: Digit designator D: Destination word Applicable Program Areas...
Page 242 2 Instructions Operand Specifications Word addresses Indirect DM addresses Area Constants Pulse bits TR bits Flags Name Label Operation Error Flag P_ER • ON if there is a parity error in the ASCII data. • ON if the ASCII data in the source words is not equivalent to hexadecimal digits •...
Page 243 2 Instructions Sample program When CIO 0.00 is ON in the following example, HEX(162) converts the ASCII data in D100 and D101 according to the settings of the digit designator. (Di=#0121 specifies no parity, the starting byte (when reading) = leftmost byte, the number of bytes to read = 3, and the starting digit (when writing) = digit 1.) HEX(162) converts three bytes of ASCII data (3 characters) beginning with the leftmost byte of D100 into their hexadecimal equivalents and writes this data to D200 beginning with digit 1.
Page 244 2 Instructions Output example Conversion data Output result (hex data) ASCII (MSB) bit content (LSB) Value Bit content code * Parity bit - changes according to the parity specification. When CIO 0.00 is ON in the following example, HEX(162) converts the ASCII data in D10 beginning with the rightmost byte and writes the hexadecimal equivalents in D300 beginning with digit 1.
Page 245 2 Instructions Example of converting multiple bytes of ASCII code to hex Di: #0112 Di: #0030 Di: #0131 Leftmost Leftmost Rightmost Leftmost Rightmost Leftmost Rightmost Leftmost Rightmost Rightmost Digit 3 Digit 2 Digit 1 Digit 0 Digit 3 Digit 2 Digit 1 Digit 0 Digit 3 Digit 2 Digit 1 Digit 0 CP1E CPU Unit Instructions Reference Manual(W483) 2-209...
Page 246: Logic Instructions
2 Instructions Logic Instructions ANDW/ANDL Function Instruction Mnemonic Variations Function code Takes the logical AND of corresponding bits in sin- LOGICAL AND ANDW @ANDW gle words of word data and/or constants. Takes the logical AND of corresponding bits in DOUBLE LOGICAL AND ANDL @ANDL double words of word data and/or constants.
Page 247 2 Instructions Function ANDW → R ANDW(034) takes the logical AND of data spec- ified in I and I and outputs the result to R. ANDL +1) → (R, R+1) • ANDL(610) takes the logical AND of data speci- R, R+1 fied in I +1 and I +1 and outputs the result...
Page 248: Orw/Orwl
2 Instructions ORW/ORWL Function Instruction Mnemonic Variations Function code Takes the logical OR of corresponding bits in sin- LOGICAL OR @ORW gle words of word data and/or constants. Takes the logical OR of corresponding bits in dou- DOUBLE LOGICAL OR ORWL @ORWL ble words of word data and/or constants.
Page 249 2 Instructions Function → R ORW(035) takes the logical OR of data speci- fied in I and I and outputs the result to R. ORWL +1) → (R, R+1) +1) + (I ORWL(611) takes the logical OR of data R, R+1 specified in I and I as double-word data and...
Page 250: Xorw/Xorl
2 Instructions XORW/XORL Function Instruction Mnemonic Variations Function code Takes the logical exclusive OR of corresponding EXCLUSIVE OR XORW @XORW bits in single words of word data and/or constants. Takes the logical exclusive OR of corresponding DOUBLE EXCLUSIVE OR XORL @XORL bits in double words of word data and/or con- stants.
Page 251 2 Instructions Function XORW → R • • XORW(036) takes the logical exclusive OR of data specified in I and I and outputs the result to R. XORL +1) → (R, R+1) • • +1) + (I XORL(612) takes the logical exclusive OR of data specified in I and I as double-word data...
Page 252: Com/Coml
2 Instructions COM/COML Function Instruction Mnemonic Variations Function code Turns OFF all ON bits and turns ON all OFF bits in COMPLEMENT @COM Turns OFF all ON bits and turns ON all OFF bits in DOUBLE COMPLEMENT COML @COML Wd and Wd+1. COML COM(029) COML(614)
Page 253 2 Instructions Sample program When CIO 0.00 is ON in the following example, the status of each bit D100 will be reversed. 15 14 13 12 11 10 0.00 D100 1 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 D100 15 14 13 12 11 10 D100 0 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0...
Page 254: Special Math Instructions
2 Instructions Special Math Instructions Function Instruction Mnemonic Variations Function code Calculates the sine, cosine, or a linear extrapola- ARITHMETIC PROCESS @APR tion of the source data. APR(069) C: Control word Symbol S: Source word R: Result word Applicable Program Areas Area Step program areas Subroutines...
Page 255 2 Instructions Linear Extrapolation Function • Linear Extrapolation (C = Data area address) Operand Value Data range APR(069) linear extrapolation is specified when C is a word Data area address address. 16-bit unsigned BCD data 0000 to 9999 The content of word C specifies the number of coordinates in 16-bit unsigned binary a data table starting at C+2, the form of the source data, and 0 to 65,535...
Page 256 2 Instructions · Signed Integer Data (Binary) 14 13 12 11 Number of coordinates minus one (m-1), 00 to FF hex (1 ≤ m ≤ 256) Floating-point specification for S and D 0: Integer data Data length specification for S and D (note 1) 0: 16-bit signed binary data 1: 32-bit signed binary data Signed data specification for S and D...
Page 257 2 Instructions Flags Name Label Operation Error Flag P_ER • ON if C is a constant greater than 0001. ≤ ≤ ≤ • ON if C is a word address but the X coordinates are not in ascending order (X •...
Page 258 2 Instructions 16-bit Unsigned BCD Data Setting name Bit in C Setting The input data and/or the output data can Input data (S) format 0: Binary be 16-bit unsigned BCD data. Also, the lin- 1: BCD ear extrapolation function can be set to Output data (D) format 0: Binary operate on the value specified in S directly...
Page 259 2 Instructions Floating-point Data Setting name Bit in C Setting Input data (S) format Output data (D) format Source data form Signed data specification for S and D Data length specification for S and D Floating-point specification 1: Floating-point data Note If the “Floating-point specification”...
Page 260 2 Instructions • Y = f(X ), Y = f(X Word Coordinate • Be sure that X < X in all cases. Xm (max. X value) • Input all values of (X ) as binary data. ↓ ↓ C+(2m+1) (max. X value) C+(2m+2) This example shows how to construct a linear extrapolation with 12 coordinates.
Page 261 2 Instructions • Using 32-bit Signed Binary Data In this example, APR(069) is used to convert the fluid height in a tank to fluid volume based on the shape of the holding tank. Fluid height to volume conversion table (32-bit signed binary data) X0 (rightmost 16 bits) X0 (leftmost 16 bits) Y0 (rightmost 16 bits)
Page 262 2 Instructions • Using Floating-point Data In this example, APR(069) is used to convert the fluid height in a tank to fluid volume based on the shape of the holding tank. X0 (rightmost 16 bits) Fluid height to volume X0 (leftmost 16 bits) conversion table (Floating-point data) Y0 (rightmost 16 bits)
Page 263: Bcnt
2 Instructions BCNT Function Instruction Mnemonic Variations Function code Counts the total number of ON bits in the specified BIT COUNTER BCNT @BCNT word(s). BCNT BCNT(067) N: Number of words Symbol S: First source word R: Result word Applicable Program Areas Area Step program areas Subroutines...
Page 264 2 Instructions Precautions • Some time will be required to complete BCNT(067) if a large number of words is specified. Even if an interrupt occurs, execution of this instruction will not be interrupted and execution of the interrupt task will be started after execution of BCNT(067) has been completed. One BCNT(067) instruction can be replaced with two BCNT(067) instructions to help avoid this problem.
Page 265: Floating-Point Math Instructions
2 Instructions Floating-point Math Instructions The Floating-point Math Instructions convert data and perform floating-point arithmetic operations. Data Format Floating-point data expresses real numbers using a sign, exponent, and mantissa. When data is expressed in floating-point format, the following formula applies. e–...
Page 266 2 Instructions Writing Floating-point Data When floating-point is specified for the data format in the I/O memory edit display in the CX-Program- mer, standard decimal numbers input in the display are automatically converted to the floating-point for- mat shown above (IEEE754-format) and written to I/O Memory. Data written in the IEEE754-format is automatically converted to standard decimal format when monitored on the display.
Page 267 2 Instructions (2) Non-normalized Numbers Non-normalized numbers express real numbers with very small absolute values. The sign bit will be 0 for a positive number and 1 for a negative number. The exponent (e) will be 0, and the real exponent will be –126. The mantissa (f) will be expressed from 1 to 2 –...
Page 268 2 Instructions (3) Precautions in Handling Special Values The following precautions apply to handling zero, infinity, and NaN. • The sum of positive zero and negative zero is positive zero. • The difference between zeros of the same sign is positive zero. •...
Page 269: Fix/Fixl
2 Instructions FIX/FIXL Function Instruction Mnemonic Variations Function code Converts a 32-bit floating-point value to 16-bit FLOATING TO 16-BIT @FIX signed binary data and places the result in the specified result word. Converts a 32-bit floating-point value to 32-bit FLOATING TO 32-BIT FIXL @FIXL signed binary data and places the result in the...
Page 270 2 Instructions Function FIX(450) converts the integer portion of the 32-bit floating-point number in S+1 and S (IEEE754-format) to 16-bit signed binary data and places the result in R. Floating-point data (32 bits) Signed binary data (16 bits) Only the integer portion of the floating-point data is converted, and the fraction portion is truncated. Example conversions: A floating-point value of 3.5 is converted to 3.
Page 271: Flt/Fltl
2 Instructions FLT/FLTL Function Instruction Mnemonic Variations Function code Converts a 16-bit signed binary value to 32-bit 16-BIT TO FLOATING @FLT floating-point data and places the result in the specified result words. Converts a 32-bit signed binary value to 32-bit 32-BIT TO FLOATING FLTL @FLTL...
Page 272 2 Instructions Function FLT(452) converts the 16-bit signed binary value in S to 32-bit floating-point data (IEEE754-format) and places the result in R+1 and R. A single 0 is added after the decimal point in the floating-point result. Signed binary data (16 bits) Floating-point data (32 bits) Only values within the range of -32,768 to 32,767 can be specified for S.
Page 273: F, -F, *F, /F
2 Instructions +F, –F, *F, /F Function Instruction Mnemonic Variations Function code Adds two 32-bit floating-point numbers and places FLOATING-POINT ADD the result in the specified result words. Subtracts one 32-bit floating-point number from FLOATING-POINT SUBTRACT –F @–F another and places the result in the specified result words.
Page 274 2 Instructions Flags Name Label Operation Error Flag P_ER • ON if the augend or addend data is not a number (NaN). • ON if +∞ and –∞ are added. • ON if the minuend or subtrahend is not a number (NaN). •...
Page 275 2 Instructions Multiplicand (floating-point data, 32 bits) Md+1 × Mr+1 Multiplier (floating-point data, 32 bits) Result (floating-point data, 32 bits) Dd+1 Dividend (floating-point data, 32 bits) ÷ Dr+1 Divisor (floating-point data, 32 bits) Result (floating-point data, 32 bits) • If the absolute value of the result is greater than the maximum value that can be expressed as float- ing-point data, the Overflow Flag will turn ON and the result will be output as ±∞.
Page 276 2 Instructions FLOATING-POINT MULTIPLY (*F) Multiplicand Multiplier Numeral +∞ –∞ Numeral See note 1. +/–∞ +/–∞ +∞ +/–∞ +∞ –∞ –∞ +/–∞ +∞ –∞ Note 1 The results could be zero (including underflows), a numeral, +∞, or –∞. The Error Flag will be turned ON and the instruction will not be executed. FLOATING-POINT DIVIDE (/F) Dividend Divisor...
Page 277: F, <>F, F, >=F
2 Instructions =F, <>F, <F, <=F, >F, >=F Function Instruction Mnemonic Variations Function code These input comparison instructions compare two <>F single-precision floating point values (32-bit Single-precision Floating-point <F IEEE754 constants and/or the contents of speci- Comparison <=F fied words) and create an ON execution condition >F when the comparison condition is true.
Page 278 2 Instructions Function The input comparison instruction LD connection ON execution condition when compares the data specified in S1 comparison result is true. and S2 as single-precision floating <F point values (32-bit IEEE754 data) and creates an ON execution condi- tion when the comparison condition is true.
Page 279 2 Instructions Code Mnemonic Name Function LD>=F LOAD FLOATING GREATER THAN OR EQUAL True if ≥ +1, S AND>=F AND FLOATING GREATER THAN OR EQUAL +1, S OR>=F OR FLOATING GREATER THAN OR EQUAL Precautions • Input comparison instructions cannot be used as right-hand instructions, i.e., another instruction must be used between them and the right bus bar.
Page 280: Fstr
2 Instructions FSTR Function Instruction Mnemonic Variations Function code Expresses a 32-bit floating-point value (IEEE754- FLOATING-POINT TO ASCII FSTR @FSTR format) in standard decimal notation or scientific notation and converts that value to ASCII text. FSTR FSTR(448) Symbol S: First source word C: First control word D: First destination word Applicable Program Areas...
Page 281 2 Instructions Function FSTR(448) expresses the 32-bit floating-point number in S+1 and S (IEEE754-format) in decimal nota- tion or scientific notation according to the control data in words C to C+2, converts the number to ASCII text, and outputs the result to the destination words starting at D. •...
Page 282 2 Instructions Storage of ASCII Text After the floating-point number is converted to ASCII text, the ASCII characters are stored in the desti- nation words beginning with D, as shown in the following diagrams. Different storage methods are used for decimal notation and scientific notation. Decimal notation (C=0 hex) Total number of characters Integer part...
Page 283 2 Instructions • Limits on the Number of Digits in the Integer Part 1) Decimal Notation (C = 0 hex) • When there is no fractional part (C+2 = 0 hex): 1 ≤ Number of Integer Digits ≤ 24-1 • When there is a fractional part (C+2 = 1 to 7 hex): 1 ≤...
Page 284 2 Instructions Converting to ASCII Text in Scientific Notation When CIO 0.00 is ON in the following example, FSTR(448) converts the floating-point data in D1 and D0 to scientific-notation ASCII text and writes the ASCII text to the destination words beginning with D100.
Page 285: Fval
2 Instructions FVAL Function Instruction Mnemonic Variations Function code Converts a number expressed in ASCII text (deci- mal or scientific notation) to a 32-bit floating-point ASCII TO FLOATING-POINT FVAL @FVAL value (IEEE754-format) and outputs the floating- point value to the specified words. FVAL FVAL(449) Symbol...
Page 286 2 Instructions • Scientific Notation Real numbers expressed as an integer part, fractional part, and exponent part. Example: 1.2456E-2 (1.2456×10 The data format (decimal or scientific notation) is detected automatically. The ASCII text must be stored in S and subsequent words in the following order: leftmost byte of S, rightmost byte of S, leftmost byte of S+1, rightmost byte of S+1, etc.
Page 287 2 Instructions Storage of ASCII Text The following diagrams show how the ASCII text number is converted to floating-point data. Different conversion methods are used for numbers stored with decimal notation and scientific notation. ASCII Character Storage FVAL(449) converts the ASCII characters starting with the leftmost byte of S and continuing until a byte containing 00 hex is reached.
Page 288 2 Instructions Sample program Converting ASCII Text in Decimal Notation to Floating-point Data When CIO 0.00 is ON in the following example, FVAL(449) converts the specified decimal-notation ASCII text number in the source words starting at D0 to floating-point data and writes the result to des- tination words D100 and D101.
Page 289: Table Data Processing Instructions
2 Instructions Table Data Processing Instructions SWAP Function Instruction Mnemonic Variations Function code Switches the leftmost and rightmost bytes in all of SWAP BYTES SWAP @SWAP the words in the range. SWAP SWAP(637) Symbol N: Number of words R1: First word in range Applicable Program Areas Area Step program areas...
Page 290 2 Instructions Function SWAP(637) switches the position of the two Byte position is swapped. bytes in all of the words in the range of mem- ory from R1 to R1+N-1. Hint • This instruction can be used to reverse the order of ASCII-code characters in each word. Sample program When CIO 0.00 is ON in the following example, SWAP(637) switches the data in the leftmost bytes with the data in the rightmost bytes in each word in the 10-word range from W0 to W9.
Page 291: Fcs
2 Instructions Function Instruction Mnemonic Variations Function code Calculates the FCS value for the specified range FRAME CHECKSUM @FCS and outputs the result in ASCII. FCS(180) C: First control word Symbol R1: First word in range D: First destination word Applicable Program Areas Area Step program areas...
Page 292 2 Instructions Function FCS(180) calculates the FCS value for W units of data beginning with the data in R1, converts W (Table length) the value to ASCII code, and outputs the result to D (for bytes) or D+1 and D (for words). The settings in C+1 determine whether the units ASCII conversion Calculation...
Page 293: Data Control Instructions
2 Instructions Data Control Instructions PIDAT Function Instruction Mnemonic Variations Function code PID CONTROL WITH Executes PID control according to the specified PIDAT AUTOTUNING parameters. The PID constants can be autotuned. PIDAT(191) S: Input word Symbol C: First parameter word D: Output word Applicable Program Areas Area...
Page 294 2 Instructions Operand Specifications Word addresses Indirect DM addresses Area Constants Pulse bits TR bits S, C, D Flags Name Label Operation Error Flag P_ER • ON if the C data is out of range. • ON if the actual sampling period is more than twice the designated sampling period. •...
Page 295 2 Instructions The following flowchart shows the autotuning procedure: The AT Command Bit (bit 15 of C+9) is ON at the start of PIDAT(191) execution or it is turned ON during execution. PID control is interrupted, the PV is forcibly changed, and the PID constants are calculated automatically.
Page 296: Performance Specifications
2 Instructions Hint • PIDAT(191) is executed as if the execution condition was a STOP-RUN signal. PID calculations are executed when the execution condition remains ON for the next cycle after C+11 to C+40 are initial- ized. Therefore, when using the Always ON Flag (ON) as an execution condition for PIDAT(191), pro- vide a separate process where C+11 to C+40 are initialized when operation is started.
Page 297 2 Instructions Block Diagram for Target Value PID with Two Degrees of Freedom When overshooting is prevented with simple PID control, stabilization of disturbances is slowed (1). If stabilization of disturbances is speeded up, on the other hand, overshooting occurs and response toward the target value is slowed (2).
Page 298 2 Instructions Change with ON Control data Item Contents Setting range input condition Bit 00 of C+5 PID forward/reverse Determines the direction of the proportional 0: Reverse action Not allowed designation action. 1: Forward action Bit 12 of C+6 Manipulated variable Determines whether or not limit control will apply 0: Disabled (no limit control) output limit control...
Page 299 2 Instructions Sampling Period and Cycle Time The sampling period can be designated in units of 10 ms (0.01 to 99.99 s), but the actual PID action is determined by a combination of the sampling period and the time of PID instruction execution (with each cycle).
Page 300 2 Instructions PID control Proportional Action (P) Proportional action is an operation in which a proportional band is established with respect to the set value (SV), and within that band the manipulated variable (MV) is made proportional to the deviation. An example for reverse operation is shown in the following illustration.
Page 301 2 Instructions Derivative Action (D) Proportional action and integral action both make corrections with respect to the control results, so there is inevitably a response delay. Derivative action compensates for that drawback. In response to a sudden disturbance it delivers a large manipulated variable and rapidly restores the original status. A correction is executed with the manipulated variable made proportional to the incline (derivative coefficient) caused by the deviation.
Page 302 2 Instructions Direction of Action When using PID control, select either of the following two control directions. In either direction, the MV increases as the difference between the SV and the PV increases. • Forward action: MV is increased when the PV is larger than the SV. •...
Page 303 2 Instructions Sample program Interrupting PID Control to Perform Autotuning • At the rising edge of CIO 0.00 (OFF to ON), the work area in D211 to 0.00 D240 is initialized according to the parameters (shown below) set in PIDAT D200 to D208.
Page 304 2 Instructions Starting PIDAT(191) with Autotuning At the rising edge of CIO 0.00 (OFF to ON), autotuning will be performed first if bit 0.00 15 of D209 (C+9) is ON. When autotuning is completed, the calculated P, I, and D PIDAT constants are written to C+1, C+2, and C+3.
Page 305: Tpo
2 Instructions Function Instruction Mnemonic Variations Function code Inputs the duty ratio or manipulated variable from the specified word, converts the duty ratio to a TIME-PROPORTIONAL time-proportional output based on the specified OUTPUT parameters, and outputs the result from the speci- fied output.
Page 306 2 Instructions R: Pulse Output Bit Specifies the destination output bit for the pulse output. Normally, specify an output bit allocated to a Transistor Output Unit and connect a solid state relay to the Transistor Output Unit. Operand Specifications Word addresses Indirect DM addresses Area Constants...
Page 307: Parameter Settings
2 Instructions In this case, set the same value for the PID Control instruction’s output range and the TPO(685) instruc- tion’s manipulated variable range. For example, when the PID Control instruction’s output range and the TPO(685) instruction’s manipulated variable range are both set to 12 bits (0000 to 0FFF hex), the duty ratio is calculated by dividing the manipulated variable from the PID Control instruction by 0FFF hex and TPO(685) converts that duty ratio to a time-proportional output.
Page 308 2 Instructions • The parameters (in C to C+3) are read in real time each time that the instruction is executed. When changing the parameters, change all of them at the same time so that different sets of parameters are not mixed.
Page 309 2 Instructions • Input time setting = 2 (Use higher value.) Control period (a) Control period (a) 100% 70% target is kept. Duty ratio (MV/MV range) 70% target raised to 80%. a × a × 0.45 s a × 0.55 s a ×...
Page 310 2 Instructions Precautions When using TPO(685) in combination with PIDAT(191) in a cyclic task and also using an interrupt task, temporarily disable interrupts by executing DI(693) (DISABLE INTERRUPTS) ahead PIDAT(191) and TPO(685). If interrupts are not disabled and an interrupt occurs between the PIDAT(191) and TPO(685), the control period may be shifted.
Page 311 2 Instructions Using TPO(685) Alone When CIO 0.00 is ON, TPO(685) takes the duty ratio in D10, converts the duty ratio to a time-propor- tional output, and outputs the pulses to bit 00 of CIO 100. In this case, the control period is 1 s and the output limit function is enabled with a lower limit 20.00% and an upper limit of 80.00%.
Page 312: Scl
2 Instructions Function Instruction Mnemonic Variations Function code Converts unsigned binary data into unsigned BCD SCALING @SCL data according to the specified linear function. SCL(194) Symbol S: Source word P1: First parameter word R: Result word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks...
Page 313 2 Instructions Flags Name Label Operation Error Flag P_ER • ON if the contents of P1 (Ar) or P1+1 (Br) is not BCD. • ON if the contents of P1+1 (As) and P1+3 (Bs) are equal. • OFF in all other cases. Equals Flag P_EQ •...
Page 314 2 Instructions Sample program In the following example, it is assume that an analog signal from 1 to 5 V is converted and input to D0 as 0000 to 0FA0 hexadecimal. SCL(194) is used to convert (scale) the value in CIO 200 to a value between 0 and 300 BCD.
Page 315 2 Instructions In this example, values from 0000 to 00C8 hexadecimal will be converted to negative values. SCL(194), however, can output only unsigned BCD values from 0000 to 9999, so 0000 BCD will be output when- ever the contents of D0.00 is between 0000 and 00C8 hexadecimal. Reverse Scaling Reverse scaling can also be used by setting As <...
Page 316: Scl2
2 Instructions SCL2 Function Instruction Mnemonic Variations Function code Converts signed binary data into signed BCD data SCALING 2 SCL2 @SCL2 according to the specified linear function. An offset can be input in defining the linear function. SCL2 SCL2(486) Symbol S: Source word P1: First parameter word R: Result word...
Page 317 2 Instructions Flags Name Label Operation Error Flag P_ER • ON if the contents of C+1 (∆X) is 0000. • ON if the contents of C+2 (∆Y) is not BCD. • OFF in all other cases. Equals Flag P_EQ • ON if the result is 0. •...
Page 318 2 Instructions Hint • SCL2(486) can be used to scale the results of analog signal conversion values from Analog Input Units according to user-defined scale parameters. For example, if a 1 to 5-V input to an Analog Input Unit is input to memory as 0000 to 0FA0 hexadecimal, the value in memory can be scaled to –100 to 200°C using SCL2(486).
Page 319 2 Instructions Scaling 1 to 5-V Analog Input to –200 to 200 In the following example, it is assume that an analog signal from 1 to 5 V is converted and input to CIO 3 as 0000 to 1770 hexadecimal. SCL2(486) is used to convert (scale) the value in CIO 3 to a value between –0200 and 0200 BCD.
Page 320: Scl3
2 Instructions SCL3 Function Instruction Mnemonic Variations Function code Converts signed BCD data into signed binary data SCALING 3 SCL3 @SCL3 according to the specified linear function. An offset can be input in defining the linear function. SCL3 SCL3(487) S: Source word Symbol P1: First parameter word R: Result word...
Page 321 2 Instructions Operand Specifications Word addresses Indirect DM addresses Area Constants Pulse bits TR bits S. P1,R Flags Name Label Operation Error Flag P_ER • ON if the contents of S is not BCD. • ON if the contents of C+1 (∆X) is not between 0001 and 9999 BCD. •...
Page 322 2 Instructions Positive Offset Negative Offset R (signed binary) R (signed binary) Max conversion Max conversion ∆Y ∆Y ∆X ∆X S (signed BCD) Offset Offset Min. conversion S (signed BCD) Min. conversion Offset of 0000 R (signed binary) Max conversion ∆Y ∆X S (signed BCD)
Page 323: Avg
2 Instructions Function Instruction Mnemonic Variations Function code Calculates the average value of an input word for AVERAGE the specified number of cycles. AVG(195) S: Source word Symbol N: Number of cycles R: Result first word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks...
Page 324 2 Instructions Function For the first N–1 cycles when the execution condition is ON, AVG(195) writes the values of S: Source word S in order to words starting with R+2. The Pre- vious Value Pointer (bits 00 to 07 of R+1) is incremented each time a value is written.
Page 325 2 Instructions • In the following example, the content of CIO 40 is set to #0000 and then incremented by 1 each cycle. • For the first two cycles, AVG(195) moves the content of CIO 40 to D1002 and D1003. The contents of D1001 will also change (which can be used to confirm that the results of AVG(195) has changed).
Page 326: Subroutines Instructions
2 Instructions Subroutines Instructions Function Instruction Mnemonic Variations Function code Calls the subroutine with the specified subroutine SUBROUTINE CALL @SBS number and executes that program. Symbol SBS(091) N: Subroutine number Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand...
Page 327 2 Instructions Function SBS(091) calls the subroutine with the Execution condition ON specified subroutine number. The subrou- tine is the program section between SBN(092) and RET(093). When the sub- routine is completed, program execution Main program continues with the next instruction after SBS(091).
Page 328 2 Instructions Precautions • The subroutine number must be unique for each subroutine. You cannot use the 0.00 same number for more than one sub- routine. • Each subroutine must have a unique 0.01 subroutine number. Do not use the same subroutine number for more than one subroutine.
Page 329 2 Instructions Sample program Sequential (Non-nested) Subroutines CIO 0.00 ON 0.00 Main program CIO 0.01 ON 0.01 0.00 0.01 Order of execution A → S1 → B → S2 → C A → S1 → B → C A → B → S2 → C A →...
Page 330 2 Instructions Nested Subroutines CIO 0.00 ON 0.00 S1-1 Order of execution 0.00 0.01 A → S1-1 → S2 → S1-2 → B 0.01 CIO 0.00 ON A → S1-1 → S1-2 → B Subroutine 1 A → B A → B S1-2 Subroutine 2 When CIO 0.00 is ON in the following example, subroutine 1 is executed.
Page 331: Sbn/Ret
2 Instructions SBN/RET Function Instruction Mnemonic Variations Function code Indicates the beginning of the subroutine program with SUBROUTINE ENTRY the specified subroutine number. SUBROUTINE RETURN Indicates the end of a subroutine program. Symbol SBN(092) RET(093) N: Subroutine number Applicable Program Areas Area Step program areas Subroutines...
Page 332 2 Instructions Flags SBN/RET There are no flags affected by this instruction. Function SBN(092) indicates the beginning of the sub- routine with the specified subroutine number. The end of the subroutine is indicated by RET(093). The region of the program beginning at the first SBN(092) instruction is the subroutine region.
Page 333 2 Instructions • The step instructions, STEP(008) and SNXT(009) cannot be used in subroutines. SNXT Not allowed STEP • Place the subroutines after the main program and just before the END(001) instruction in the program for each task. If part of the main program is placed after the subroutine region, that program section will be ignored.
Page 334: Interrupt Control Instructions
2 Instructions Interrupt Control Instructions CP1E CPU Units support the following interrupts. Type Execution condition Setting procedure I/O Interrupts Interrupt input from the built-in Input on the CPU Use the MSKS instruction to assign inputs from Interrupt Input on Rack turns ON/OFF. the CPU Rack.
Page 335 2 Instructions Related Memory Area Words Name Address Operation Maximum Interrupt A440 The maximum processing time for an interrupt task is stored in binary data in 0.1-ms units and is cleared Task Processing Time at the start of operation. Interrupt Task with A441 The interrupt task number with maximum processing time is stored in binary data.
Page 336 2 Instructions MSKS Function Instruction Mnemonic Variations Function code Controls whether I/O interrupt tasks and sched- SET INTERRUPT MASK MSKS @MSKS uled interrupt tasks are executed. MSKS MSKS(690) Symbol N: Interrupt identifier C: Control data Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage...
Page 337 2 Instructions Operand Specifications Word addresses Indirect DM addresses Area Constants Pulse bits TR bits Flags Name Label Operation Error Flag P_ER ON if N is not within the specified range. Errors when specifying I/O Interrupts: • The Error Flag will go ON if C is not within the specified range. Errors when specifying Scheduled Interrupts: •...
Page 338: Msks
2 Instructions Precaution • Be sure that the time interval is longer than the time required to execute the scheduled interrupt task. • To accurately control the time to the first interrupt and the interrupt interval, program CLI(691) to set the time to the first schedule interrupt just before programming MSKS(690).
Page 339 2 Instructions Function Instruction Mnemonic Variations Function code Clears/retains recorded interrupt inputs, sets the CLEAR INTERRUPT @CLI time to the first scheduled interrupt for scheduled interrupt tasks. CLI(691) Symbol N: Interrupt number C: Control data Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage...
Page 340 2 Instructions (3) Clearing/Retaining High-speed Counter Interrupts Operand Contents High-speed Counter Input 10: High-speed counter input 0 11: High-speed counter input 1 12: High-speed counter input 2 13: High-speed counter input 3 14: High-speed counter input 4 15: High-speed counter input 5 (Cannot be used in CP1E-E10D - ) Recorded Interrupt 0000 hex: Retain the recorded interrupt.
Page 341: Cli
2 Instructions (2) N = 4: Setting the Time to the First Scheduled Interrupt Task When N is 4, the content of C specifies the time interval to the first scheduled interrupt task. MSKS(690) Execution of scheduled interrupt task. Time to first scheduled interrupt (3) N = 10 or 15: Clearing High-speed Counter Interrupts When N is 10 or 15, CLI(691) clears or retains the recorded high-speed counter interrupt (target...
Page 342 2 Instructions Function Instruction Mnemonic Variations Function code Disables execution of all interrupt tasks except the DISABLE INTERRUPTS power OFF interrupt. Symbol DI(693) Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Not allowed Flags Name Label Operation Error Flag P_ER •...
Page 343 2 Instructions Function Instruction Mnemonic Variations Function code Enables execution of all interrupt tasks that were ENABLE INTERRUPTS disabled with DI(693). Symbol EI(694) Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Not allowed Flags Name Label Operation Error Flag P_ER •...
Page 344: High-Speed Counter/Pulse Output Instructions
2 Instructions High-speed Counter/Pulse Output Instructions Mne- Varia- Function Instruction Function monic tions code INI(880) can be used to execute the following operations • To start comparison with the high-speed counter comparison table • To stop comparison with the high-speed counter comparison table MODE CONTROL @INI •...
Page 345 2 Instructions C: Control Data INI(880) function 0000 hex Starts comparison. 0001 hex Stops comparison. 0002 hex Changes the PV. 0003 hex Stops pulse output. NV: First Word with New PV If C is 0002 hex (i.e., when changing a PV), NV and NV+1 contain the new PV.
Page 346 2 Instructions Changing a PV (C = 0002 hex) Port and mode Operation Setting range The present value of the pulse output is changed. The new value is specified in NV and NV+1. 8000 0000 to 7FFF FFFF hex Pulse output (P = 0000 or 0001 hex) Note This instruction can be executed only (-2,147,483,648 to 2,147,483,647) when pulse output is stopped.
Page 347: Prv
2 Instructions Function Instruction Mnemonic Variations Function code HIGH-SPEED PRV(881) reads the High-speed counter PV and pulse output PV @PRV and interrupt input PV in counter mode. COUNTER PV READ PRV(881) Symbol P: Port specifier C: Control data D: First destination word Applicable Program Areas Area Step program areas...
Page 348 2 Instructions D: First Destination Word Lower word of PV Upper word of PV 2-word PV Pulse output PV, high-speed counter input PV, high-speed counter input frequency for high-speed counter input 0 1-word PV Status, range comparison results Operand Specifications Word addresses Indirect DM addresses Area...
Page 349 2 Instructions Reading a PV (C = 0000 hex) Port and mode Operation Setting range Pulse output (P = 0000 or 0001 hex) The present value of the pulse output is stored in 8000 0000 to 7FFF FFFF hex D and D+1. (−2,147,483,648 to 2,147,483,647) High-speed counter Linear Mode...
Page 350 2 Instructions Reading Pulse Output or High-speed Counter Frequency (C = 00@3 hex) If C is 00@3 hex, PRV(881) reads the frequency being output from pulse output 0 or 1 or the frequency being input to high-speed counter 0 and stores it in D and D+1. 0000 or 0001 hex (Reading the frequency of pulse output 0 or 1) 0000 0000 to 0001 86A0 hex (0 to 100,000) 0010 hex (Reading the frequency of high-speed counter 0)
Page 351: Ctbl
2 Instructions CTBL Function Instruction Mnemonic Variations Function code REGISTER CTBL(882) is used to register a comparison table and perform CTBL @CTBL COMPARISON TABLE comparisons for a high-speed counter PV. CTBL CTBL(882) Symbol P: Port specifier C: Control data TB: First comparison table word Applicable Program Areas Area Step program areas...
Page 352 2 Instructions TB: First comparison table word • TB is the first word of the comparison table. The structure of the comparison table depends on the type of comparison being performed. For target value comparison, the length of the comparison table is determined by the number of tar- get values specified in TB.
Page 353 2 Instructions Flags Name Label Operation Error Flag P_ER • ON if the specified range for P or C is exceeded. • ON if the number of target values specified for target value comparison is set to 0. • ON if the number of target values specified for target value comparison exceeds 6. •...
Page 354 2 Instructions Range Comparison The corresponding interrupt task is called and executed when the PV enters a set range. • The same interrupt task number can be specified for more than one target value. • The range comparison table contains 6 ranges, each of which is defined by a lower limit and an upper limit.
Page 355: Sped
2 Instructions SPED Function Instruction Mnemonic Variations Function code SPED(885) is used to set the output pulse frequency for a specific SPEED OUTPUT SPED @SPED port and start pulse output without acceleration or deceleration. SPED SPED(855) Symbol P: Port specifier M: Output mode F: First pulse frequency word Applicable Program Areas...
Page 356 2 Instructions Flags Name Label Operation Error Flag P_ER • ON if the specified range for P, M, or F is exceeded. • ON if PLS2(887) or ORG(889) is already being executed to control pulse output for the specified port. •...
Page 357 2 Instructions Procedure/ Operation Purpose Application Frequency changes Description instruction Stopping Stop pulse Immediate stop Stops the pulse output SPED(885) (Continu- Pulse frequency pulse output output immediately. ous) ↓ Present frequency INI(880) Time Execution of INI(880) Stop pulse Immediate stop Stops the pulse output SPED(885) (Continu- Pulse frequency...
Page 358 2 Instructions Procedure/ Operation Purpose Application Frequency changes Description instruction Stopping To stop pulse Immediate stop Stops the pulse output PULS(886) Pulse frequency pulse output output (Num- immediately and clears ↓ ber of pulses the number of output Present SPED(885) setting is not pulses setting.
Page 359: Puls
2 Instructions PULS Function Instruction Mnemonic Variations Function code PULS(886) is used to set the pulse output amount (number of out- SET PULSES PULS @PULS put pulses). PULS PULS(886) Symbol P: Port specifier T: Pulse type N: Number of pulses Applicable Program Areas Area Step program areas...
Page 360 2 Instructions Flags Name Label Operation Error Flag P_ER • ON if the specified range for P, T, or N is exceeded. • ON if PULS(886) is executed for a port that is already outputting pulses. • ON if PULS(886) is executed in an interrupt task when an instruction controlling pulse output is being executed in a cyclic task.
Page 361: Pls2
2 Instructions PLS2 Function Instruction Mnemonic Variations Function code PLS2(887) outputs a specified number of pulses to the specified port. Pulse output starts at a spec- ified startup frequency, accelerates to the target PULSE OUTPUT PLS2 @PLS2 frequency at a specified acceleration rate, decel- erates at the specified deceleration rate, and stops at approximately the same frequency as the star- tup frequency.
Page 362 2 Instructions S: First Word of Settings Table Acceleration rate 1 to 65535 Hz (#0001 to FFFF) S1+1 Deceleration rate Specify the increase or decrease in the frequency per pulse control period (4 ms). Lower word with target frequency S1+2 0 to 100,000 Hz (0000 0000 to 0001 86A0 hex) Upperword with target frequency...
Page 363 2 Instructions Function PLS2(887) starts pulse output on the port specified in P using the mode specified in M at the start fre- quency specified in F (1 in diagram). The frequency is increased every pulse control period (4 ms) at the acceleration rate specified in S until the target frequency specified in S is reached (2 in diagram).
Page 364 2 Instructions Independent Mode Positioning Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode. Opera- Procedure/ Purpose Application Frequency changes Description tion instruction Starting Complex Positioning with Accelerates and deceler- PLS2(887) Specified number Pulse frequency pulse out- trapezoidal trapezoidal accel-...
Page 365 2 Instructions Opera- Procedure/ Purpose Application Frequency changes Description tion instruction Changing To change Changing the PLS2(887) can be exe- PULS(886) target posi- Number of pulses settings, acceleration and cuted during positioning ↓ Pulse tion and specified by continued deceleration rates (acceleration or deceler- speed frequency...
Page 366 2 Instructions Switching from Continuous Mode Speed Control to Independent Mode Positioning Procedure/ Example application Frequency changes Description instruction Change from speed control to fixed PLS2(887) can be executed during a ACC(888) distance positioning during operation speed control operation started with (Continuous) Outputs the number of ACC(888) to change to positioning oper-...
Page 367: Acc
2 Instructions Function Instruction Mnemonic Variations Function code ACC(888) outputs pulses to the specified output ACCELERATION CONTROL @ACC port at the specified frequency using the specified acceleration and deceleration rate. ACC(888) Symbol P: Port specifier M: Output mode S: First word of settings table Applicable Program Areas Area Step program areas...
Page 368 2 Instructions Operand Specifications Word addresses Indirect DM addresses Pulse Area Constants bits bits P, M Flags Name Label Operation Error Flag P_ER • ON if the specified range for P, M, or S is exceeded. • ON if pulses are being output using ORG(889) for the specified port. •...
Page 369 2 Instructions Continuous Mode Speed Control Pulse output will continue until it is stopped from the program. Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode. Opera- Procedure/ Purpose Application Frequency changes Description tion instruction Starting To output...
Page 370 2 Instructions Independent Mode Positioning When independent mode operation is started, pulse output will be continued until the specified number of pulses has been output. The deceleration point is calculated from the number of output pulses and deceleration rate set in S and when that point is reached, the frequency is decreased every pulse control period (4 ms) at the deceler- ation rate specified in S until the specified number of points has been output, at which point pulse out- put is stopped.
Page 371 2 Instructions Opera- Procedure/ Purpose Application Frequency changes Description tion instruction Stopping To stop Decelerating to a Decelerates the pulse PULS(886) Pulse frequency pulse out- pulse out- stop output to a stop. ↓ put, con- Note If ACC(888) started ACC(888) or Present tinued smoothly.
Page 372: Org
2 Instructions Function Instruction Mnemonic Variations Function code ORG(889) performs an origin search or origin ORIGIN SEARCH @ORG return operation. ORG(889) Symbol P: Port specifier C: Control data Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand Description Data type...
Page 373 2 Instructions Flags Name Label Operation Error Flag P_ER • ON if the specified range for P or C is exceeded. • ON if ORG(889) is specified for a port during pulse output for SPED(885), ACC(888), or PLS2(887). • ON if ORG(889) is executed in an interrupt task when an instruction controlling pulse output is being executed in a cyclic task.
Page 374 2 Instructions When the origin search operation has been completed, the Error Counter Reset Output will be turned ON. The above operation, however, depends on the operating mode, origin detection method, and other parameters. Origin Return (Bits 12 to 15 of C = 1 hex) ORG(889) starts outputting pulses using the Pulse frequency Origin return...
Page 375: Pwm
2 Instructions Function Instruction Mnemonic Variations Function code PULSE WITH VARIABLE PWM(891) is used to output pulses with the speci- @PWM DUTY FACTOR fied duty factor from the specified port. Symbol P: Port specifier F: Frequency D: Duty factor Applicable Program Areas Area Step program areas Subroutines...
Page 376 2 Instructions Operand Specifications Word addresses Indirect DM addresses Area Constants Pulse bits TR bits F, D Flags Name Label Operation Error Flag P_ER • ON if the specified range for P, F, or D is exceeded. • ON if PWM are being output using ORG(889) for the specified port. •...
Page 377: Step Instructions
2 Instructions Step Instructions In CP1E series PLCs, STEP(008)/SNXT(009) can be used together to create step programs. Instruction Operation Diagram SNXT(009): STEP Controls progression to the next step of the program. Step Ladder section start instruction START Equivalent to STEP(008): STEP Indicates the start of a step.
Page 378: Snxt/Step
2 Instructions SNXT/STEP Function Instruction Mnemonic Variations Function code SNXT(009) is used to control progression of step STEP START SNXT execution in the step program area. STEP(008) is used to define the beginning and STEP DEFINE STEP the end of the step program area. SNXT STEP When defining the beginning of a step, a control bit is specified as...
Page 379 2 Instructions Proceeding to the Next Step When SNXT(009) occurs in the middle of the step program area, it is used to proceed to the next step. It turns OFF the previous control bit and turns ON the next control bit B, for the next step, thereby starting step B (all instructions after STEP(008) B).
Page 380 2 Instructions Hint A200.12 (Step Flag) is turned ON for one cycle 0.00 when STEP(008) is executed. This flag can be Start SNXT used to conduct initialization once the step exe- W0.00 W0.00 cution has started. STEP A200.12 W0.00 1 cycle 0.01 0001 A200.12...
Page 381 2 Instructions • STEP(008) and SNXT(009) cannot be used inside of subroutines, interrupt programs, or block pro- grams. • Be sure that two steps are not executed during the same cycle. • The instructions that cannot be used within step programs are listed in the following table. Function Mnemonic Name...
Page 382 2 Instructions (1) Sequential Control 0.01 SNXT 0.01 (Step (A) starting condition) W0.00 STEP Step (A) W0.00 W0.00 Step W0.00 (A) 0.02 (Step (A) → Step (B) transition condition) Step (A) ladder program Step (B) W0.01 0.02 SNXT 0.03 (Step (B) → Step (C) transition condition) W0.01 STEP Step (C) W0.02...
Page 383: Additional Information
2 Instructions (2) Branching Control 0.01 0.02 SNXT 0.02 (Step (B) starting condition) 0.01 (Step (A) W0.00 starting condition) 0.02 0.01 Step (A) W0.00 Step (B) W0.01 SNXT W0.01 0.03 (Step (A) → Step (C) transition 0.04 (Step (B) → Step (C) condition) STEP transition condition)
Page 384 2 Instructions (3) Parallel Control 0.01 SNXT 0.01 (Step (A), (C) simultaneous starting condition) W0.00 Step (A) W0.00 Step (C) W0.02 SNXT W0.02 0.02 (Step (A) → 0.03 (Step (C) → Step (D) Step (B) transition STEP condition) transition condition) W0.00 Step (B) W0.01 Step (D) W0.02...
Page 385: Application Examples
2 Instructions Application Examples (1) Sequential Execution Robot hand Solenoid 1 Solenoid 2 Photomicro- SW 1 sensor SW 4 SW 2 SW 3 Conveyor belt 1 Conveyor belt 2 Conveyor belt 3 Process A: Loading Process B: Part installation Process C: Inspection/Unloading 0.01(SW1) Process A SNXT...
Page 386 2 Instructions (2) Branching Execution Printer SW C1 SW D SW A1 Guide SW A2 SW C2 Process A Conveyer A Process B Conveyer B SW B2 SW B1 Weight scale Process C 0.01 0.02 (SW A1) (SW B1) SNXT 0.02(SW B1) 0.01(SW A1) W0.00...
Page 387 2 Instructions (3) Parallel Execution Conveyer B Process A Conveyer A Process B Process E Conveyer E Process D Process C Conveyer D Conveyer C 0.01(SW1, SW2) Process A SNXT started. 0.01(SW 1 and SW2 both ON) Process C W0.00 started.
Page 388: Basic I/O Unit Instructions
2 Instructions Basic I/O Unit Instructions IORF Function Instruction Mnemonic Variations Function code I/O REFRESH IORF @IORF Refreshes the specified I/O words. IORF IORF(097) Symbol St: Starting word E: End word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Operands Operand...
Page 389 2 Instructions Units Refreshed by IORF(097) Unit type Refreshable by IORF(097) CPU Unit with CP1E CPU Unit built-in I/O: 0CH, 1CH, 100CH and 101CH 30 or 40 I/O CP1W Expansion I/O Unit: 2CH to 99CH, 102CH to 199CH Points CP1W Expansion Unit: 2CH to 99CH, 102CH to 199CH CPU Unit with CP1E CPU Unit built-in I/O: 0CH, 1CH, 2CH, 100CH, 101CH and 102CH 60 I/O Points...
Page 390: Sdec
2 Instructions SDEC Function Instruction Mnemonic Variations Function code Converts the hexadecimal contents of the desig- nated digit(s) into 8-bit, 7-segment display code 7-SEGMENT DECODER SDEC @SDEC and places it into the upper or lower 8-bits of the specified destination words. SDEC SDEC(078) Symbol...
Page 391 2 Instructions Function SDEC(078) regards the data specified by S as 4-digit hexadecimal data, converts the digits specified in S by Di (first digit and Number of digits number of digits) to 7-segment data and outputs the results to D in the bits specified First digit to convert in Di.
Page 392 2 Instructions 7-segment Data The following table shows the data conversions from a hexadecimal digit (4 bits) to 7-segment code (8 bits). Original data Converted code (segments) Display Original data Digit Bits – 2-356 CP1E CPU Unit Instructions Reference Manual(W483)
Page 393: Dsw
2 Instructions Function Instruction Mnemonic Variations Function code Reads the value set on a external digital switch (or thumbwheel switch) connected to an I/O Unit and DIGITAL SWITCH INPUT stores the 4-digit or 8-digit value in the specified words. DSW(210) I: Input word Symbol O: Output word...
Page 394 2 Instructions D: First Result Word Specifies the leading word address where the external digital switch’s set values will be stored. 12 11 Digit 4 Digit 2 Digit 3 Digit 1 12 11 (See note.) Digit 8 Digit 6 Digit 7 Digit 5 Note: Only when C1 = 0001 hex to read 8 digits.
Page 395: External Connections
2 Instructions External Connections Connect the digital switch or thumbwheel switch to Input Unit contacts 0 to 7 and Output Unit contacts 0 to 4, as shown in the following diagram. The following example illustrates connections for an A7B Thum- bwheel Switch.
Page 396 2 Instructions Precaution • Do not read or write the system word (C2) from any other instruction. DSW(210) will not operate cor- rectly if the system word is accessed by another instruction. The system word is not initialized by DSW(210) in the first cycle when program execution starts. If DSW(210) is being used from the first cycle, clear the system word from the program.
Page 397: Mtr
2 Instructions Function Instruction Mnemonic Variations Function code Inputs up to 64 signals from an 8 × 8 matrix con- nected to an Input Unit and an Output Unit (using MATRIX INPUT 8 input points and 8 output points) and stores that 64-bit data in the 4 destination words.
Page 398 2 Instructions D: First Register Word Specifies the leading word address of the 4 words that contain the data from the 8 × 8 matrix. Bits 00 to 15 correspond to matrix elements 0 to 15. Bits 00 to 15 correspond to matrix elements 16 to 31.
Page 399 2 Instructions Flags Name Label Operation Error Flag P_ER Function MTR(213) outputs the selection signals to bits 00 to 07 of O, reads the data in order from bits 00 to 07 of I, and stores the 64 bits of data in the 4 words D through D+3. MTR(213) reads the status of the 64- bit matrix every 24 CPU Unit cycles.
Page 400 2 Instructions Precaution • Do not read or write the system word (C) from any other instruction. MTR(213) will not operate cor- rectly if the system word is accessed by another instruction. The system word is not initialized by MTR(213) in the first cycle when program execution starts. If MTR(213) is being used from the first cycle, clear the system word from the program.
Page 401: 7Seg
2 Instructions 7SEG Function Instruction Mnemonic Variations Function code Converts the source data (either 4-digit or 8-digit 7-SEGMENT DISPLAY 7SEG BCD) to 7-segment display data, and outputs that OUTPUT data to the specified output word. 7SEG 7SEG(214) S: Source word Symbol O: Output word C: Control data...
Page 402 2 Instructions • Converting 8 digits One Round Flag Latch outputs Leftmost 4-digit data output Rightmost 4-digit data output C: Control Data The value of C indicates the number of digits of source data and the logic for the Input and Output Units, as shown in the following table.
Page 403 2 Instructions External Connections Connect the 7-segment display to the Output Unit as shown in the following diagram. This example shows an 8-digit display. With a 4-digit display, the data outputs (D0 to D3) would be connected to out- puts 0 to 3 and the latch outputs (LE0 to LE3) would be connected to outputs 4 to 7. Output point 12 (for 8-digit display) or output point 8 (for 4-digit display) will be turned ON when one round of data has been output, but it is not necessary to connect them unless required by the application.
Page 404 2 Instructions Precaution • Do not read or write the system word (D) from any other instruction. 7SEG(214) will not operate cor- rectly if the system word is accessed by another instruction. The system word is not initialized by 7SEG(214) in the first cycle when program execution starts. If 7SEG(214) is being used from the first cycle, clear the system word from the program.
Page 405: Serial Communication Instructions
2 Instructions Serial Communication Instructions Function Instruction Mnemonic Variations Function code Outputs the specified number of bytes of data TRANSMIT @TXD from the CPU Unit’s built-in RS-232C port or the Serial Option Board port. TXD(236) S: First source word Symbol C: Control word N: Number of bytes 0000 to 0100 hex (0 to 256)
Page 406: Related Auxiliary Area Words And Bits
2 Instructions Flags Name Label Operation Error Flag P_ER • ON if no-protocol mode is not set in the PLC Setup. • ON if the value of C is not within range. • ON if the value for N is not between 0000 and 0100 hex. •...
Page 407 2 Instructions • Up to 259 bytes can be sent, including the send data (N = 256 bytes max.), the start code, and the end code. • Specify the size of the send data, not including the start code and end code, in N. Start code / end code settings and send data N bytes of data is sent in the following order when sending the most significant bytes first is specified:...
Page 408: Hardware Configuration
2 Instructions Sample program Sending Data to a Code Reader This example shows how to send data to the V530-R150V3 2D Code Reader as an example of commu- nicating with an external device. Hardware Configuration Sync Sensor Monitor F150-M05L Power Supply Console (24 VDC) F150-KP...
Page 409: Programming Example
2 Instructions Programming Example If CIO 0.01 turns ON while the RS-232C Port Send Ready Flag (A392.05) is ON, three bytes of data starting from the upper byte of D10 are sent without conversion to the Code Reader connected to the CPU Unit’s built-in RS-232C port.
Page 410: Rxd
2 Instructions Function Instruction Mnemonic Variations Function code Reads the specified number of bytes of data from RECEIVE @RXD the CPU Unit’s built-in RS-232C port or the Serial Option Board port. RXD(235) D: First destination word Symbol C: Control word N: Number of bytes to store 0000 to 0100 hex (0 to 256 decimal) Applicable Program Areas...
Page 411 2 Instructions Related Auxiliary Area Words and Bits Auxiliary Area Flags for CPU Unit’s RS-232C Port Name Address Contents RS-232C Port Reception Completed Flag A392.06 ON when no-protocol reception is completed. Number of Receive Bytes Specified: The flag will turn ON when the specified number of bytes has been received.
Page 412 2 Instructions Function • RXD(235) reads data that has been received in no-protocol mode at the CPU Unit’s built-in RS-232C port or the Serial Option Board port (the port is specified with bits 8 to 11 of C) and stores N bytes of data in words D to D+(N÷2)-1.
Page 413 2 Instructions Start Code/End Code Settings and Receive Data No Start or End Code 1 2 3 4 5 6 0... Receive bytes: Specified in the PC Setup Only Start Code 1 2 3 4 5 6 0... Receive bytes after ST: Specified in the PC Setup Only End Code 1 2 3 4 5 6 0...
Page 414 2 Instructions Sample program Receiving data This example shows how to receive data from the V530-R150V3 2D Code Reader as an example of communicating with an external device. Hardware Configuration Sync Sensor Monitor F150-M05L Power Supply Console (24 VDC) F150-KP Console Cable RS-232C Cable XW2Z-200T (2 m)
Page 415 2 Instructions Programming Example If CIO 0.02 turns ON while the RS-232C Port Send Ready Flag (A392.05) is ON, the number of bytes of reading results specified in the RS-232C Port Reception Counter (A393) are read from the Code Reader connected to the CPU Unit’s built-in RS-232C port and stored starting from the upper byte of D100.
Page 416: Clock Instructions
2 Instructions Clock Instructions CADD/CSUB Function Instruction Mnemonic Variations Function code Adds time to the calendar data in the specified CALENDAR ADD CADD @CADD words. Subtracts time from the calendar data in the spec- CALENDAR SUBTRACT CSUB @CSUB ified words. CADD CSUB CSUB(731)
Page 417 2 Instructions CADD C through C+2: Calendar Data T and T+1: Time Data Seconds: 00 to 59 (BCD) Seconds: 00 to 59 (BCD) Minutes: 00 to 59 (BCD) Minutes: 00 to 59 (BCD) Hours: 0000 to 9999 (BCD) Hour: 00 to 23 (BCD) Day: 01 to 31 (BCD) Month: 01 to 12 (BCD) Year: 00 to 99 (BCD)
Page 418 2 Instructions CSUB C through C+2: Calendar Data T and T+1: Time Data Seconds: 00 to 59 (BCD) Seconds: 00 to 59 (BCD) Minutes: 00 to 59 (BCD) Minutes: 00 to 59 (BCD) Hour: 00 to 23 (BCD) Hours: 0000 to 9999 (BCD) Day: 01 to 31 (BCD) Month: 01 to 12 (BCD) Year: 00 to 99 (BCD)
Page 419 2 Instructions Operand Specifications Word addresses Indirect DM addresses Area Constants Pulse bits TR bits Flags Name Label Operation Error Flag P_ER • ON if the calendar data in C through C+2 is not within the specified ranges. • ON if the time data in T and T+1 is not within the specified ranges. •...
Page 420 2 Instructions Sample program CADD When CIO 0.00 turns ON in the following example, the calendar data in D100 through D102 (year, month, day, hour, minutes, seconds) is added to the time data in D200 and D201 (hours, minutes, sec- onds) and the result is output to D300 through D302.
Page 421: Date
2 Instructions DATE Function Instruction Mnemonic Variations Function code Changes the internal clock setting to the setting in CLOCK ADJUSTMENT DATE @DATE the specified source words. DATE DATE(735) Symbol S: First source word Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage...
Page 422 2 Instructions Related Auxiliary Area Words and Bits Name Address Operation Clock data A351 to A354 A351.00 to A351.07: Seconds (00 to 59) (BCD) A351.08 to A351.15: Minutes (00 to 59) (BCD) A352.00 to A352.07: Hours (00 to 23) (BCD) A352.08 to A352.15: Day of the month (01 to 31) (BCD) A353.00 to A353.07: Month (01 to 12) (BCD) A353.08 to A353.15: Year (00 to 99) (BCD)
Page 423: Failure Diagnosis Instructions
2 Instructions Failure Diagnosis Instructions Function Instruction Mnemonic Variations Function code Generates or clears user-defined non-fatal errors. FAILURE ALARM @FAL Non-fatal errors do not stop PLC operation. Generating or Clearing User-defined Non-fatal Errors Generating Non-fatal System Errors FAL(006) FAL(006) Symbol N: FAL number (value in A529) N: FAL number S: First message word or...
Page 424 2 Instructions Flags Name Label Operation Error Flag • ON if N is not within the specified range of 0 to 511 decimal. • ON if a non-fatal system error is being generated, but the specified error code or error details code is incorrect.
Page 425 2 Instructions Function Generating Non-fatal User-defined Errors The following table shows the error codes and FAL Error Flags for FAL(006). FAL number 1 to 511 decimal FAL error codes 4101 to 42FF Executed FAL Number Flags A360.01 to A391.15 When FAL(006) is executed with N set to an FAL number (&1 to &511) that is not equal to the content of A529 (the system-generated FAL/FALS number), a non-fatal error will be generated with that FAL num- ber and the following processing will be performed: FAL Error Flag ON...
Page 426 2 Instructions 1. The specified error code will be written to A400. 2. The error code and the time that the error occurred will be written to the Error Log Area (A100 through A199). 3. The appropriate Auxiliary Area Flags are set based on the error code and error details. 4.
Page 427 2 Instructions Note Even if PLC Setup word 129 bit 15 is set to 1 (Do not record FAL Errors in Error Log.), the following errors will be recorded: • Fatal errors generated by FALS(007) • Non-fatal errors from the system •...
Page 428 2 Instructions Clearing a Particular Non-fatal Error When CIO 0.01 is ON in the following example, FAL(006) will clear the non-fatal error with FAL number 31, turn OFF the corresponding Executed FAL Number Flag (A361.15), and turn OFF the FAL Error Flag (A402.15).
Page 429: Fals
2 Instructions FALS Function Instruction Mnemonic Variations Function code Generates user-defined fatal errors. Fatal errors SEVERE FAILURE ALARM FALS stop PLC operation. FALS Generating User-defined Fatal Errors Generating Fatal System Errors FALS(007) FALS(007) Symbol N: FAL number N: FAL number (value in A529) S: First message word or S: First word containing the constant (0000 to FFFF)
Page 430 2 Instructions Related Auxiliary Area Words and Bits Auxiliary Area Words/Flags for User-defined Errors Only Name Address Operation FALS Error Flag A401.06 ON when an error is generated with FALS(007). Auxiliary Area Words/Flags for System Errors Only Name Address Operation System-generated FAL/FALS A529 A dummy FAL/FALS number is used when a system error is generated with FALS(007).
Page 431 2 Instructions 4 When a user-defined fatal error is registered, the I/O memory and output status from output units will be as indicated below. I/O memory Output status from output units Hold IOM Hold Bit (A500.12). Hold Generating Non-fatal System Errors Error code written to A400 Execution of FALS(007) Error code and time written to Error Log Area...
Page 432 2 Instructions The following table shows how to specify error codes and error details in S and S+1. Error name Error code Error details Memory Error 80F1 hex Bits 00 to 09: Memory Error Location Bit 00: User program Bit 01: I/O memory Bit 04: PLC Setup Bits 2, 3, 5 to 15: Invalid I/O Bus Error...
Page 433 2 Instructions Sample program Generating a User-defined Error When CIO 0.00 is ON in the following example, FALS(007) will generate a fatal error with FAL number 31 and execute the following processes. 1. The FALS Error Flag (A401.06) will be turned ON. 2.
Page 434: Other Instructions
2 Instructions Other Instructions STC/CLC Function Instruction Mnemonic Variations Function code SET CARRY @STC Sets the Carry Flag (CY). CLEAR CARRY @CLC Turns OFF the Carry Flag (CY). Symbol STC(040) CLC(041) Applicable Program Areas Area Step program areas Subroutines Interrupt tasks Usage Flags Data type...
Page 435: Wdt
2 Instructions Function Instruction Mnemonic Variations Function code Extends the maximum cycle time, but only for the cycle in which the instruction is executed. WDT(094) can be EXTEND MAXIMUM @WDT used to prevent errors for long cycle times when a CYCLE TIME longer cycle time is temporarily required for special processing.
Page 436: Plc Setup Settings
2 Instructions PLC Setup settings Name Function Settings Watch cycle time A Cycle Time Too Long error (fatal error) will be registered if the cycle 0: Default setting (1,000 ms) time exceeds the maximum setting. 1: User time setting Sets the maximum cycle time. 0001 to 0FA0 (This setting is valid only when the first setting has been set to 1.) (10 to 1,000 ms, 10-ms units)
Page 437: Instruction Execution Times And Number Of Steps
Instruction Execution Times and Number of Steps This section provides the execution times for all instructions used with a CP1E CPU Unit. 3-1 CP1E CPU Unit Instruction Execution Times and Number of Steps ..3-2 CP1E CPU Unit Instructions Reference Manual(W483)
Page 438: Cp1E Cpu Unit Instruction Execution Times And Number Of Steps
3 Instruction Execution Times and Number of Steps CP1E CPU Unit Instruction Execution Times and Number of Steps The following table lists the execution times for all instructions that are supported by the CPU Units. The total execution time of instructions within one whole user program is the process time for program execution when calculating the cycle time (See note.).
Page 439 3 Instruction Execution Times and Number of Steps Sequence Input Instructions Length ON execution Instruction Mnemonic Conditions (steps) time (µs) LOAD 1.19 10.26 LOAD NOT LD NOT 1.19 !LD NOT 10.26 1.19 !AND 10.26 AND NOT AND NOT 1.19 !AND NOT 10.26 1.29 10.36...
Page 440 3 Instruction Execution Times and Number of Steps Sequence Control Instructions Length ON execution Instruction Mnemonic Conditions (steps) time (µs) NO OPERATION INTERLOCK INTERLOCK CLEAR MULTI-INTERLOCK MILH 19.4 During interlock DIFFERENTIATION HOLD 19.4 Not during interlock and interlock not set 21.5 Not during interlock and interlock set MULTI-INTERLOCK...
Page 441 3 Instruction Execution Times and Number of Steps Comparison Instructions Length ON execution Instruction Mnemonic FUN No. Conditions (steps) time (µs) Input Comparison Instructions LD,AND,OR+= (unsigned) LD,AND,OR+<> LD,AND,OR+< LD,AND,OR+<= LD,AND,OR+> LD,AND,OR+>= Input Comparison Instructions LD,AND,OR+=+L 10.8 (double, unsigned) LD,AND,OR+<>+L LD,AND,OR+<+L LD,AND,OR+<=+L LD,AND,OR+>+L LD,AND,OR+>=+L...
Page 442 3 Instruction Execution Times and Number of Steps Data Movement Instructions Length ON execution Instruction Mnemonic Conditions (steps) time (µs) MOVE !MOV 57.7 DOUBLE MOVE MOVL MOVE NOT 13.7 MOVE BIT MOVB 21.4 MOVE DIGIT MOVD 22.4 MULTIPLE BIT TRANSFER XFRB 26.4 Transferring 1 word...
Page 443 3 Instruction Execution Times and Number of Steps Increment/Decrement Instructions Length ON execution Instruction Mnemonic Conditions (steps) time (µs) INCREMENT BINARY 12.3 DOUBLE INCREMENT BINARY 13.5 DECREMENT BINARY 12.3 DOUBLE DECREMENT BINARY 13.6 INCREMENT BCD 13.2 DOUBLE INCREMENT BCD ++BL 14.4 DECREMENT BCD 13.2...
Page 444 3 Instruction Execution Times and Number of Steps Conversion Instructions Length ON execution Instruction Mnemonic Conditions (steps) time (µs) BCD TO BINARY 15.1 DOUBLE BCD TO DOUBLE BINL 16.7 BINARY BINARY TO BCD 15.1 DOUBLE BINARY TO BCDL 17.3 DOUBLE BCD 2’S COMPLEMENT 14.3 DATA DECODER...
Page 445 3 Instruction Execution Times and Number of Steps Floating-point Math Instructions Length ON execution Instruction Mnemonic Conditions (steps) time (µs) FLOATING TO 16-BIT 15.9 FLOATING TO 32-BIT FIXL 16.2 16-BIT TO FLOATING 16.2 32-BIT TO FLOATING FLTL 17.1 FLOATING-POINT ADD 24.1 FLOATING-POINT SUBTRACT 25.2...
Page 446: Subroutine Instructions
3 Instruction Execution Times and Number of Steps Subroutine Instructions Length ON execution Instruction Mnemonic Conditions (steps) time (µs) SUBROUTINE CALL SUBROUTINE ENTRY SUBROUTINE RETURN Interrupt Control Instructions Length ON execution Instruction Mnemonic Conditions (steps) time (µs) SET INTERRUPT MASK MSKS 15.1 15.1...
Page 447: Serial Communications Instructions
3 Instruction Execution Times and Number of Steps Length ON execution Instruction Mnemonic Conditions (steps) time (µs) ACCELERATION CONTROL 75.6 Continuous mode 82.8 Independent mode ORIGIN SEARCH 52.2 Origin search 126.8 Origin return PULSE WITH VARIABLE DUTY 28.9 FACTOR Step Instructions Length ON execution Instruction...
Page 448 3 Instruction Execution Times and Number of Steps Failure Diagnosis Instructions Length ON execution Instruction Mnemonic Conditions (steps) time (µs) FAILURE ALARM 55.6 Recording errors 79.6 Deleting errors (in order of priority) 61.6 Deleting errors (all errors) 60.0 Deleting errors (individually) SEVERE FAILURE ALARM FALS Other Instructions...
Page 449: Monitoring And Computing The Cycle Time
Monitoring and Computing the Cycle Time This section describes how to monitor and calculate the cycle time of a CP1E CPU Unit that can be used in the programs. 4-1 Monitoring the Cycle Time ........4-2 4-1-1 Monitoring the Cycle Time .
Page 450: Monitoring The Cycle Time
Monitoring and Computing the Cycle Time Monitoring the Cycle Time 4-1-1 Monitoring the Cycle Time The average, maximum, and minimum cycle times can be monitored when the CX-Programmer is con- nected online to a CPU Unit. Monitoring the Average Value While connected online to the PLC, the average cycle time is displayed in the status bar when the CPU Unit is in any mode other than PROGRAM mode.
Page 451: Computing The Cycle Time
Monitoring and Computing the Cycle Time Computing the Cycle Time 4-2-1 CPU Unit Operation Flowchart The CPU Unit processes data in repeating cycles from the overseeing processing up to peripheral servicing as shown in the following diagram. Power ON Checks Unit connection status Checks hardware and user program memory Error...
Page 452: Cycle Time Overview
Monitoring and Computing the Cycle Time 4-2-2 Cycle Time Overview The cycle time depends on the following conditions. • Type and number of instructions in the user program (cyclic tasks and all interrupt tasks for which the execution conditions have been satisfied) •...
Page 453: I/O Refresh Times For Plc Units
Monitoring and Computing the Cycle Time (5) Peripheral Servicing Operation Processing time and fluctuation cause Services peripheral In this servicing, 8% of the previous cycle’s cycle time (calculated in USB port step (3)) will be allowed for peripheral servicing. Services serial port (Built-in RS-232C port, serial option board)
Page 454: Cycle Time Calculation Example
Monitoring and Computing the Cycle Time 4-2-4 Cycle Time Calculation Example The following example shows the method used to calculate the cycle time when Expansion I/O Units are connected to a CP1E CPU Unit. Conditions Item Description CP1E CPU Unit 40-point I/O Unit 1 Unit CP1W-40EDR...
Page 455: Appendices
Appendices Alphabetical List of Instructions by Mnemonic ......A-2 CP1E CPU Unit Instructions Reference Manual(W483)
Page 456: Alphabetical List Of Instructions By Mnemonic
Appendices Alphabetical List of Instructions by Mnemonic Immediate Upward Downward Mne- refreshing Instruction differen- differentia- Page Immediate monic specifica- Upward Downward tiation tion Mne- refreshing tion Instruction differen- differentia- Page monic specifica- tiation tion AND<F 2-241 tion FLOATING ACCELER- @ACC 2-331 LESS THAN ATION...
Page 457 Appendices Immediate Immediate Upward Downward Upward Downward Mne- refreshing Mne- refreshing Instruction differen- differentia- Page Instruction differen- differentia- Page monic specifica- monic specifica- tiation tion tiation tion tion tion AND>= AND DBL 2-88 BINL DOUBLE @BINL 2-185 SIGNED BCD TO GREATER DOUBLE THAN OR...
Page 458 Appendices Immediate Upward Downward Mne- refreshing Instruction differen- differentia- Page Immediate monic specifica- Upward Downward tiation tion Mne- refreshing tion Instruction differen- differentia- Page monic specifica- tiation tion 2-56 tion FSTR FLOATING- @FSTR 2-244 DATE CLOCK @DATE 2-385 POINT TO ADJUST- ASCII MENT...
Page 459 Appendices Immediate Immediate Upward Downward Upward Downward Mne- refreshing Mne- refreshing Instruction differen- differentia- Page Instruction differen- differentia- Page monic specifica- monic specifica- tiation tion tiation tion tion tion LD NOT LOAD NOT !LD NOT LD=F LOAD 2-241 FLOATING LD< LOAD LESS 2-88 EQUAL...
Page 460 Appendices Immediate Immediate Upward Downward Upward Downward Mne- refreshing Mne- refreshing Instruction differen- differentia- Page Instruction differen- differentia- Page monic specifica- monic specifica- tiation tion tiation tion tion tion MILC MULTI- 2-44 2-11 INTER- ORIGIN @ORG 2-336 LOCK SEARCH CLEAR OR LD OR LOAD 2-13...
Page 461 Appendices Immediate Immediate Upward Downward Upward Downward Mne- refreshing Mne- refreshing Instruction differen- differentia- Page Instruction differen- differentia- Page monic specifica- monic specifica- tiation tion tiation tion tion tion OR EQUAL 2-88 ORWL DOUBLE @ORWL 2-212 LOGICAL OR=DT OR DATE 2-91 EQUAL OUTPUT...
Page 462 Appendices Immediate Upward Downward Mne- refreshing Instruction differen- differentia- Page Immediate monic specifica- Upward Downward tiation tion Mne- refreshing tion Instruction differen- differentia- Page monic specifica- tiation tion TMHHX ONE-MS 2-72 tion TIMER SUBROU- 2-295 TIME-PRO- 2-269 TINE PORTION- ENTRY ALOUTPUT SUBROU- @SBS...
Page 463 Appendices Immediate Upward Downward Mne- refreshing Instruction differen- differentia- Page Immediate monic specifica- Upward Downward tiation tion Mne- refreshing tion Instruction differen- differentia- Page monic specifica- tiation tion DOUBLE 2-158 tion SIGNED AREA 2-105 BINARY- ADD WITH- RANGE COM- CARRY PARE SIGNED 2-166...
Page 464 Appendices ASCII Code Table Immediate Upward Downward Mne- refreshing Instruction differen- differentia- Page monic specifica- Four leftmost bits tiation tion tion DOUBLE @*BL 2-179 BCD MULTI- FLOATING- 2-237 POINT MULTIPLY DOUBLE 2-177 SIGNED BINARY- MULTIPLY SIGNED 2-181 BINARY DIVIDE 2-183 DIVIDE DOUBLE @/BL...
Page 465: Revision History
Revision History A manual revision code appears as a suffix to the catalog number on the front cover of the manual. Cat. No. W483-E1-03 Revision code Revision code Date Revised content March 2009 Original production June 2009 Errors were corrected. January 2010 Information added on E10/14, N14/60 and NA20 CPU Units.
Page 466 Revision-2...
Page 467 The Netherlands IL 60173-5302 U.S.A. Tel: (31)2356-81-300/Fax: (31)2356-81-388 Tel: (1) 847-843-7900/Fax: (1) 847-843-7787 © OMRON Corporation 2009 All Rights Reserved. OMRON (CHINA) CO., LTD. OMRON ASIA PACIFIC PTE. LTD. In the interest of product improvement, Room 2211, Bank of China Tower, No.

This manual is also suitable for:

Sysmac cp1e-e**d series Sysmac cp1e-n**d series Sysmac cp1e-na**d series Sysmac cp1e Sysmac cp1e-e series Sysmac cp1e series ... Show all

Omron SYSMAC CP Series Instruction & Reference Manual

Introduction

CP1E CPU Unit Manuals

Manual Structure

Safety Precautions

Precautions for Safe Use

Regulations and Standards

Related Manuals

Summary of Instructions

Notation and Layout of Instruction Descriptions

Sequence Input Instructions

Sequence Output Instructions

Sequence Control Instructions

Timer and Counter Instructions

Comparison Instructions

Data Movement Instructions

Data Shift Instructions

Increment/Decrement Instructions

Symbol Math Instructions

Conversion Instructions

Logic Instructions

Special Math Instructions

Floating-Point Math Instructions

Table Data Processing Instructions

Data Control Instructions

Subroutines Instructions

Interrupt Control Instructions

High-Speed Counter/Pulse Output Instructions

Step Instructions

Basic I/O Unit Instructions

Serial Communication Instructions

Clock Instructions

Failure Diagnosis Instructions

Other Instructions

CP1E CPU Unit Instruction Execution Times and Number of Steps

Monitoring the Cycle Time

Computing the Cycle Time

Alphabetical List of Instructions by Mnemonic

Quick Links

Related Manuals for Omron SYSMAC CP Series

Summary of Contents for Omron SYSMAC CP Series