Omron CP1H CPU Operation Manual page 134

Cp1h cpu unit
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Computing the Cycle Time
Note
(Interrupt signal retrieval)
Interrupt task execution
Cyclic task execution
(main program)
Scheduled Interrupt Tasks
Note
100
been executed. The length of the interrupt response time for I/O interrupt
tasks depends on the following conditions.
Item
Hardware response
Software interrupt
response
(1) The wait time occurs when there is competition with other interrupts. As
a guideline, the wait time will be 3 to 153 µs.
(2) I/O interrupt tasks can be executed during execution of the user program
(even while an instruction is being executed by stopping the execution of
an instruction), I/O refresh, peripheral servicing, or overseeing. The inter-
rupt response time is not affected by which of the above processing op-
erations during which the interrupt inputs turns ON. I/O interrupts,
however, are not executed during execution of other interrupt tasks even
if the I/O interrupt conditions are satisfied. Instead, the I/O interrupts are
executed in order of priority after the current interrupt task has completed
execution and the software interrupt response time has elapsed.
The interrupt response time of input interrupt tasks is calculated as follows:
Interrupt response time = Input ON delay + Software interrupt response time
Input
Input ON delay
Software interrupt response time
Input interrupt task
response time
The time from completing the ladder program in the input
interrupt task until returning to cyclic task execution is 60 µs.
The interrupt response time of scheduled interrupt tasks is the time taken
from after the scheduled time specified by the MSKS(690) instruction has
elapsed until the interrupt task has actually been executed. The length of the
interrupt response time for scheduled interrupt tasks is 1 ms max. There is
also an error of 80 µs in the time to the first scheduled interrupt (0.5 ms min.).
(1) Scheduled interrupt tasks can be executed during execution of the user
program (even while an instruction is being executed by stopping the ex-
ecution of an instruction), I/O refresh, peripheral servicing, or overseeing.
The interrupt response time is not affected by which of the above pro-
cessing operations during which the scheduled interrupt time occurs.
Scheduled interrupts, however, are not executed during execution of oth-
er interrupt tasks even if the interrupt conditions are satisfied. Instead, the
interrupts are executed in order of priority after the current interrupt task
has completed execution and the software interrupt response time has
elapsed.
Interrupt response time
Rise time: 50 µs
Fall time: 50 µs
Minimum: 98 µs
Maximum: 198 µs + Wait
time (See note 1.)
Return time from
Ladder program
input interrupt task
execution time
Section 2-7
Counter interrupts
---
---
Minimum: 187 µs
Maximum: 287 µs + Wait time
(See note1.)
Next interrupt signal
can be accepted.

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