Omron CP1H CPU Operation Manual page 685

Auxiliary Area Allocations by Address
Address Name
Words Bits
A302 A302.00 CPU Bus Unit
to Initializing
A302.15 Flags
A310 All Manufactur-
ing Lot Num-
ber, Lower
Digits
A311 All Manufactur-
ing Lot Num-
ber, Upper
Digits
A315 A315.13 Option Board
Error Flag
A315.14 Built-in Ana-
log I/O Error
Flag
A315.15 Flash Mem-
ory Error Flag
A316 All High-speed
to Counter 2 PV
A317
A318 All High-speed
to Counter 3 PV
A319
A320 A320.00 High-speed
Counter 2
Range 1 Com-
parison Condi-
tion Met Flag
Function
These flags are ON while the corre-
sponding CPU Bus Unit is initializing
after its CPU Bus Unit Restart Bit
(A501.00 to A501.15) is turned ON
or the power is turned ON.
Bits 00 to 15 correspond to unit num-
bers 0 to 15.
Use these flags in the program to
prevent the CPU Bus Unit's refresh
data from being used while the Unit
is initializing. IORF(097) cannot be
executed while an CPU Bus Unit is
initializing.
These bits are turned OFF automati-
cally when initialization is completed.
The manufacturing lot number is
stored in 6 digits hexadecimal. X, Y,
and Z in the lot number are con-
verted to 10, 11, and 12, respec-
tively.
Examples:
Lot number 01805
A310 = 0801, A311 = 0005
Lot number 30Y05
A310 =1130, A311 = 0005
ON when the Option Board is
removed while the power is being
supplied. CPU Unit operation will
continue and the ERR/ALM indicator
will flash.
OFF when the error has been
cleared.
ON when a built-in analog I/O error
occurs and stops the operation of
built-in analog I/O. CPU Unit opera-
tion will continue and the ERR/ALM
indicator will flash.
OFF when the error has been
cleared.
ON when writing to the internal flash
memory fails. CPU Unit operation will
continue and the ERR/ALM indicator
will flash.
OFF when the error has been
cleared.
Contains the PV of high-speed
counter 2. A317 contains the left-
most 4 digits and A316 contains the
rightmost 4 digits.
The PV is cleared when operation
starts.
Contains the PV of high-speed
counter 3. A319 contains the left-
most 4 digits and A318 contains the
rightmost 4 digits.
The PV is cleared when operation
starts.
These flags indicate whether the PV
is within the specified ranges when
high-speed counter 2 is being oper-
ated in range-comparison mode.
Cleared at beginning of operation.
Cleared when range comparison
table is registered.
OFF: PV not in range
ON: PV in range
Settings Status Status
after at star-
mode
change
OFF: Not ini- Retained Cleared
tializing
ON: Initializ-
ing
(Reset to 0
automatically
after initializa-
tion.)
--- Retained Retained ---
--- Cleared Cleared
--- Cleared Cleared
--- Cleared Cleared
--- --- Cleared
--- --- Cleared
--- --- Cleared
Appendix D
Write Related
timing flags, set-
tup tings
Written A501.00
during ini- to
tialization A501.15
---
Refreshed A402.00,
when error A424
occurs.
Refreshed A402.00
when error
occurs.
Refreshed A402.00
when error
occurs.
Refreshed ---
each cycle
during
oversee
process.
Refreshed
when
---
PRV(881)
instruction
is exe-
cuted.
Refreshed ---
each cycle
during
oversee
process.
Refreshed
when
PRV(881)
instruction
is exe-
cuted.
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