Xilinx Virtex-6 FPGA User Manual page 87

Gtx transceivers
Hide thumbs Also See for Virtex-6 FPGA:
Table of Contents

Advertisement

X-Ref Target - Figure 1-50
www.BDTIC.com/XILINX
Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
MGTRXP3_101
MGTRXN3_101
MGTTXP3_101
MGTTXN3_101
MGTRXP2_101
MGTRXN2_101
MGTTXP2_101
MGTTXN2_101
MGTREFCLK1P_101
MGTREFCLK1N_101
MGTREFCLK0P_101
MGTREFCLK0N_101
MGTRXP1_101
MGTRXN1_101
MGTTXP1_101
MGTTXN1_101
MGTRXP0_101
MGTRXN0_101
MGTTXP0_101
MGTTXN0_101
Figure 1-50: Placement Diagram for the FF1923 Package (9 of 10)
www.xilinx.com
Left Edge of the Die
AP40
AP39
HX255T:Not Available
HX380T:GTXE1_X0Y-1
HX565T:GTXE1_X0Y-1
AP44
AP43
AT40
AT39
HX255T:Not Available
HX380T:GTXE1_X0Y-2
AR42
HX565T:GTXE1_X0Y-2
AR41
AR37
AR38
AU37
AU38
AV40
AV39
HX255T:Not Available
HX380T:GTXE1_X0Y-3
HX565T:GTXE1_X0Y-3
AT44
AT43
AY40
AY39
HX255T:Not Available
HX380T:GTXE1_X0Y-4
HX565T:GTXE1_X0Y-4
AU42
AU41
Implementation
QUAD_101
UG366_c1_50_111110
87

Advertisement

Table of Contents
loading

Table of Contents