Xilinx Virtex-6 FPGA User Manual page 24
Gtx transceivers
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Also See for Virtex-6 FPGA:
- Manual (381 pages) ,
- User manual (148 pages) ,
- Getting started manual (77 pages)
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Chapter 1: Transceiver and Tool Overview
Table 1-1: Port and Attribute Summary (Cont'd)
PLL
Power Down
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24
Port/Attribute
Ports:
•
PLLTXRESET
•
PLLRXRESET
•
TXPLLLKDET
•
RXPLLLKDET
•
TXPLLLKDETEN
•
RXPLLLKDETEN
•
TXPLLPOWERDOWN
•
RXPLLPOWERDOWN
Attributes:
•
PMA_CFG
•
TX_CLK_SOURCE
•
TX_TDCC_CFG
•
TXPLL_COM_CFG
•
RXPLL_COM_CFG
•
TXPLL_CP_CFG
•
RXPLL_CP_CFG
•
TXPLL_DIVSEL_FB
•
RXPLL_DIVSEL_FB
•
TXPLL_DIVSEL_OUT
•
RXPLL_DIVSEL_OUT
•
TXPLL_DIVSEL_REF
•
RXPLL_DIVSEL_REF
•
TXPLL_DIVSEL45_FB
•
RXPLL_DIVSEL45_FB
•
TXPLL_LKDET_CFG
•
RXPLL_LKDET_CFG
•
TXPLL_SATA
•
RX_CLK25_DIVIDER
•
TX_CLK25_DIVIDER
Ports:
•
RXPLLPOWERDOWN
•
RXPOWERDOWN[1:0]
•
TXPDOWNASYNCH
•
TXPLLPOWERDOWN
•
TXPOWERDOWN[1:0]
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Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
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