Xilinx Virtex-6 FPGA User Manual page 69

X-Ref Target - Figure 1-32
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Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
MGTRXP3_103
MGTRXN3_103
MGTTXP3_103
MGTTXN3_103
MGTRXP2_103
MGTRXN2_103
MGTTXP2_103
MGTTXN2_103
MGTREFCLK1P_103
MGTREFCLK1N_103
MGTREFCLK0P_103
MGTREFCLK0N_103
MGTRXP1_103
MGTRXN1_103
MGTTXP1_103
MGTTXN1_103
MGTRXP0_103
MGTRXN0_103
MGTTXP0_103
MGTTXN0_103
Figure 1-32: Placement Diagram for the FF1154 Package (9 of 12)
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Left Edge of the Die
P30
P29
HX250T:GTXE1_X0Y15
HX380T:GTXE1_X0Y15
K34
K33
T30
T29
HX250T:GTXE1_X0Y14
HX380T:GTXE1_X0Y14
M34
M33
R27
R28
U27
U28
R32
R31
HX250T:GTXE1_X0Y13
HX380T:GTXE1_X0Y13
P34
P33
U32
U31
HX250T:GTXE1_X0Y12
HX380T:GTXE1_X0Y12
T34
T33
Implementation
QUAD_103
UG366_c1_32_111110
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