Xilinx Virtex-6 FPGA User Manual page 67

X-Ref Target - Figure 1-30
www.BDTIC.com/XILINX
Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
MGTRXP3_105
MGTRXN3_105
MGTTXP3_105
MGTTXN3_105
MGTRXP2_105
MGTRXN2_105
MGTTXP2_105
MGTTXN2_105
MGTREFCLK1P_105
MGTREFCLK1N_105
MGTREFCLK0P_105
MGTREFCLK0N_105
MGTRXP1_105
MGTRXN1_105
MGTTXP1_105
MGTTXN1_105
MGTRXP0_105
MGTRXN0_105
MGTTXP0_105
MGTTXN0_105
Figure 1-30: Placement Diagram for the FF1154 Package (7 of 12)
www.xilinx.com
Left Edge of the Die
D30
D29
HX250T:GTXE1_X0Y23
HX380T:GTXE1_X0Y23
A32
A31
F30
F29
HX250T:GTXE1_X0Y22
HX380T:GTXE1_X0Y22
B34
B33
G27
G28
J27
J28
H30
H29
HX250T:GTXE1_X0Y21
HX380T:GTXE1_X0Y21
C32
C31
J32
J31
HX250T:GTXE1_X0Y20
HX380T:GTXE1_X0Y20
D34
D33
Implementation
QUAD_105
UG366_c1_30_111110
67