Xilinx Virtex-6 FPGA User Manual page 53
Gtx transceivers
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Also See for Virtex-6 FPGA:
- Manual (381 pages) ,
- User manual (148 pages) ,
- Getting started manual (77 pages)
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X-Ref Target - Figure 1-16
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Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
LX240T: GTXE1_X0Y23
LX365T: GTXE1_X0Y23
LX550T: GTXE1_X0Y31
SX315T: GTXE1_X0Y23
SX475T: GTXE1_X0Y31
LX240T: GTXE1_X0Y22
LX365T: GTXE1_X0Y22
LX550T: GTXE1_X0Y30
SX315T: GTXE1_X0Y22
SX475T: GTXE1_X0Y30
QUAD_117
LX240T: GTXE1_X0Y21
LX365T: GTXE1_X0Y21
LX550T: GTXE1_X0Y29
SX315T: GTXE1_X0Y21
SX475T: GTXE1_X0Y29
LX240T: GTXE1_X0Y20
LX365T: GTXE1_X0Y20
LX550T: GTXE1_X0Y28
SX315T: GTXE1_X0Y20
SX475T: GTXE1_X0Y28
Figure 1-16: Placement Diagram for the FF1759 Package (2 of 9)
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MGTRXP3_117
E5
E6
MGTRXN3_117
MGTTXP3_117
F3
MGTTXN3_117
F4
F7
MGTRXP2_117
F8
MGTRXN2_117
MGTTXP2_117
G1
MGTTXN2_117
G2
E10
MGTREFCLK1P_117
E9
MGTREFCLK1N_117
MGTREFCLK0P_117
G10
MGTREFCLK0N_117
G9
G5
MGTRXP1_117
G6
MGTRXN1_117
H3
MGTTXP1_117
H4
MGTTXN1_117
H7
MGTRXP0_117
H8
MGTRXN0_117
J1
MGTTXP0_117
J2
MGTTXN0_117
Implementation
UG366_c1_16_051509
53
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