Xilinx Virtex-6 FPGA User Manual page 165

X-Ref Target - Figure 3-26
TXENPRBSTST
TXPRBSFORCEERR
RXPRBSERR_LOOPBACK = 0
RXENPRBSTST
RXPRBSERR
RX_PRBS_ERR_CNT
To calculate accurately the receiver's BER (bit error rate), an external jitter tolerance tester
should be used. For the test, the GTX transceiver should loop received error status back
through the transmitter by setting RXPRBSERR_LOOPBACK to 1
setting should be applied to RXENPRBSTST and TXENPRBSTST.
X-Ref Target - Figure 3-27
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Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
001
TX Pattern
Generator
001
RX Pattern
Checker
Figure 3-26: Link Test Mode with a PRBS-7 Pattern
Jitter Tester
TX
PRBS-7 Pattern
with Jitter
RX
Pattern Checker
Figure 3-27: Jitter Tolerance Test Mode with a PRBS-7 Pattern
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001
RXENPRBSTST
RX Pattern
Checker
RXPRBSERR_LOOPBACK = 0
001
TX Pattern
Generator
TXPRBSFORCEER
(Figure
001
RX Pattern
Checker
RXPRBSERR_LOOPBACK = 1
001
TX Pattern
Generator
TX Pattern Generator
RXPRBSERR
RX_PRBS_ERR_CNT
TXENPRBSTST
UG366_c3_16_051509
3-27). The same
RXENPRBSTST
RXPRBSERR
RX_PRBS_ERR_CNT
TXENPRBSTST
TXPRBSFORCEERR
UG366_c3_17_061809
165