Xilinx Virtex-6 FPGA User Manual page 28
Gtx transceivers
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Also See for Virtex-6 FPGA:
- Manual (381 pages) ,
- User manual (148 pages) ,
- Getting started manual (77 pages)
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Chapter 1: Transceiver and Tool Overview
Table 1-1: Port and Attribute Summary (Cont'd)
TX Configurable Driver
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28
Port/Attribute
Ports:
•
GTXTEST[1]
•
MGTREFCLKFAB[0]
•
O
•
ODIV2
•
PHYSTATUS
•
TXOUTCLK
•
TXOUTCLKPCS
•
TXRATE
•
TXRATEDONE
Attributes:
•
TRANS_TIME_RATE
•
TX_EN_RATE_RESET_BUF
•
TXOUTCLK_CTRL
•
TXPLL_DIVSEL_OUT
Ports:
•
TXBUFDIFFCTRL[2:0]
•
TXDEEMPH
•
TXDIFFCTRL[3:0]
•
TXELECIDLE
•
TXINHIBIT
•
TXMARGIN[2:0]
•
TXPDOWNASYNCH
•
TXPOSTEMPHASIS[4:0]
•
TXPREEMPHASIS[3:0]
•
TXP TXN
•
TXSWING
Attributes:
•
TX_DEEMPH_0[4:0]
•
TX_DEEMPH_1[4:0]
•
TX_DRIVE_MODE
•
TX_MARGIN_FULL_0[6:0]
•
TX_MARGIN_FULL_1[6:0]
•
TX_MARGIN_FULL_2[6:0]
•
TX_MARGIN_FULL_3[6:0]
•
TX_MARGIN_FULL_4[6:0]
•
TX_MARGIN_LOW_0[6:0]
•
TX_MARGIN_LOW_1[6:0]
•
TX_MARGIN_LOW_2[6:0]
•
TX_MARGIN_LOW_3[6:0]
•
TX_MARGIN_LOW_4[6:0]
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Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
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