Xilinx Virtex-6 FPGA User Manual page 7

Date Version
01/17/11 2.5
www.BDTIC.com/XILINX
UG366 (v2.5) January 17, 2011
Replaced PMA_COM_CFG with PMA_CFG in
RXRATE[1:0] in Chapter 4,
TXDLYALIGNMONENB, RXDLYALIGNMONENB, PMA_RXSYNC_CFG,
TXDRIVE_LOOPBACK_HIZ, and TXDRIVE_LOOPBACK_PD to
moved RX_PRBS_ERR_CNT from RX Pattern Checker to Status Registers (Read Only)
section. Added FF1154 Package Placement
Diagrams, FF1923 Package Placement
Diagrams.
Updated Figure 2-1. Added RX_CLK25_DIVIDER and TX_CLK25_DIVIDER to
Table 1-1
. Updated description of TXPDOWNASYNCH in
BIAS_CFG, and PMA_TX_CFG to
ACJTAG. Updated
Table 3-10. Updated descriptions of TXDIFFCTRL[3:0],
TXPDOWNASYNCH, TXPOSTEMPHASIS[4:0], and TXPREEMPHASIS[3:0] in
Updated description of TXPOWERDOWN[1:0] in
Updated description of IGNORESIGDET and changed direction of RXVALID from In to Out
in Table 4-9. Updated OOBDETECT_THRESHOLD attribute in
– Fixed Tap Mode and Use Mode – Auto-To-Fix
of PMA_RX_CFG, RX_EN_IDLE_HOLD_CDR, RX_EN_IDLE_RESET_FR, and
RX_EN_IDLE_RESET_PH in
description of RX_EYE_OFFSET in
Table 4-30. Updated Figure
RX_PRBS_ERR_CNT from
Table 4-34 and Table 1-1 . Updated description of ALIGN_COMMA_WORD, and added
MCOMMA_10B_VALUE, MCOMMA_DETECT, PCOMMA_10B_VALUE,
PCOMMA_DETECT, SHOW_REALIGN_COMMA, RX_SLIDE_MODE, and
RX_SLIDE_AUTO_WAIT to
of RX_LOS_THRESHOLD in
attribute type in Table 4-39. Added RXDLYALIGNMONENB to
PMA_RXSYNC_CFG to Table
in Table 4-40.
Updated Common Package Power Plane
Updated 2Ah and 47h rows of
Added Appendix C, Low Latency
Updated POWER_SAVE description in
embedded table title of TXPOSTEMPHASIS[4:0] port in
of "From TX Parallel Data" in
Use Mode – Auto-To-Fix and
Circuit to Bypass the Buffer. Updated
Table B-1.
Per XCN11009: Virtex-6: Data-Sheet, User Guides and JTAG ID Updates: Updated TX Buffer
Bypass: TX delay aligner bypassed, additional requirements on interconnect logic clocking
use model; Updated RX Buffer Bypass: RX delay aligner bypassed for lower line rates, higher
line rate support is an advanced feature.
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Revision
Table 2-9. Replaced RXRATE with
Receiver. Added note before
Diagrams,
Diagrams, and
Table
Table 2-12 and
Table
and Use Mode –
Table 4-22. Updated Eye Outline Scan
Table 4-27. Updated description of PMA_RX_CFG in
4-26. Added Manual Alignment, including
Table 4-32 and added it to
Table 4-35 and Table 1-1 . Updated
Functional Description, page
4-41. Changed direction of RXDATA[31:0] port from In to Out
Prioritization. Added
Table B-1. Added Table
Design.
Table 2-12,
Figure 4-1 and Figure
Use Mode – Auto. Updated
Figure 4-32 and
Virtex-6 FPGA GTX Transceivers User Guide
Table 1-1. Added
Table 1-1. In
FF1155 Package Placement
FF1924 Package Placement
Table 2-9
Table 2-11. Added BGTEST_CFG,
1-1. Added
Table 2-17. Added
3-34.
Table 4-10. Added
Auto. Updated descriptions
Mode. Updated
Figure 4-27. Removed
Table 4-33. Added RXSLIDE to
Figure 4-28 and description
226. Changed RX_DATA_WIDTH
Table 4-40. Added
Hot Swapping Devices.
B-2.
Table 3-19, and Table 4-41. Updated
Table 3-31. Updated description
C-3. Updated Table 4-2. Updated
Using the RX Phase Alignment
Figure 4-34. Updated DADDR in
Table 1-1,
and
Table 3-31.
Use Mode