Design Examples
Figure 2–13 Typical Multiprocessor Configuration
L2
Cache
L2
Cache
Internal Architecture
2–40
21264
Logic Chipset
21264
Host PCI
Bridge Chip
64-bit PCI Bus
Alpha 21264/EV67 Hardware Reference Manual
21272 Core
Control
Chip
Data Slice
Chips
Host PCI
Bridge Chip
64-bit PCI Bus
DRAM
Arrays
Address
Data
DRAM
Arrays
Address
Data
FM-05574-EV67