Compaq 21264 Hardware Reference Manual page 354

ReadBlk, 21264/EV67 command
,
system probes, with
ReadBlkI, 21264/EV67 command
ReadBlkMod, 21264/EV67 command
,
system probes, with
ReadBlkModSpec, 21264/EV67 command
ReadBlkModVic, 21264/EV67 command
ReadBlkSpec, 21264/EV67 command
ReadBlkSpecI, 21264/EV67 command
ReadBlkVic, 21264/EV67 command
ReadBlkVicI, 21264/EV67 command
ReadBytes, 21264/EV67 command
ReadData, SysDc command
ReadDataDirty, SysDc command
ReadDataError, SysDc command
,
4–12 4–13
ReadDataShared, SysDc command
4–12
ReadDataShared/Dirty, SysDc command
,
4–11 4–12
ReadLWs, 21264/EV67 command
ReadQWs, 21264/EV67 command
Register access abbreviations
Register figure conventions
,
Register maps, pipelined
,
Register rename maps 2–6
,
Replay traps 2–31
,
RESET interrupt 6–14
Reset state machine
,
major operations of
,
Reset_L signal pin 3–5
,
power-on reset flow
RET misprediction, in PALcode
, ,
Retire logic 2–8 D–1
,
RO,n convention xix
,
RUN reset machine state
,
RW,n convention xx
S
SAMPLE public instruction
Scrubbing single-bit errors
I_CTL Ibox control register
,
updating I_CTL D–18
Second-level cache. See Bcache
Index–10
,
4–21
4–41
,
4–22
,
4–22
4–41
,
4–22
,
4–22
,
4–22
,
4–22
,
4–22
,
4–22
,
4–22
, , ,
4–10 4–11 4–12
, , ,
4–10 4–11 4–12
, , ,
4–10 4–11
, , ,
4–10 4–11
, ,
4–10
,
4–22
,
4–22
,
xix
,
xxi
2–15
7–1
7–1
,
D–15
7–18
,
B–1
,
D–19
Security holes
with UNPREDICTABLE results
,
Serial terminal port 11–2
SET_DIRTY_ENABLE Cbox CSR
7–12
,
programming 4–24
SharedToDirty, 21264/EV67 command
system probes, with
Signal name convention
Signal pin types, defined
Signal pins
,
test 11–1
Single-bit error scribbing
Single-bit errors in hardware, correcting
SIRR software interrupt request register
at power-on reset state
SKEWED_FILL_MODE Cbox CSR
,
defined 5–34
Sleep mode
,
flow 7–9
,
timing sequence 7–11
,
SLEEP mode register
at power-on reset state
,
Spare pin type 3–3
SPEC_READ_ENABLE Cbox CSR
,
defined 5–35
SQ. See Store queue
,
SROM content map 11–6
,
SROM initialization 11–5
SROM interface, in microarchitecture
SROM line, Icache bit fields in a
,
SROM load 7–6
,
SROM load operation
,
SromClk_H signal pin
,
SromData_H signal pin
,
SromOE_L signal pin
SSRAMs
dual-data rate pin assignments
late-write non-bursting pin assignments
STC_ENABLE Cbox CSR
STCChangeToDirty, 21264/EV67 command
,
4–22 4–40
,
Storage temperature 9–1
Alpha 21264/EV67 Hardware Reference Manual
,
xxii
, , ,
4–23 5–39
, ,
4–22 4–40
,
4–41
,
xxi
,
3–3
,
D–19
,
8–2
,
5–10
,
7–15
5–21
,
7–15
,
4–23
,
2–13
,
11–6
11–2
,
3–5 11–2
,
3–5 11–2
,
3–5 11–2
,
E–3
,
E–2
,
4–24
,
4–13
,