Compaq 21264 Hardware Reference Manual page 282

IEEE Floating-Point Conformance
Table A–11 Exceptional Input and Output Conditions (Continued)
Alpha Instructions
MULx INPUT
Inf operand
QNaN operand
SNaN operand
0 * Inf
MULx OUTPUT (same as ADDx)
DIVx INPUT
QNaN operand
SNaN operand
0/0 or Inf/Inf
A/0 (A not 0)
A/Inf
Inf/A
DIVx OUTPUT (same as ADDx)
SQRTx INPUT
+Inf operand
QNaN operand
SNaN operand
-A (A not 0)
-0
SQRTx OUTPUT
Inexact result
CMPTEQ CMPTUN INPUT
Inf operand
QNaN operand
SNaN operand
CMPTLT CMPTLE INPUT
Inf operand
QNaN operand
SNaN operand
CVTfi INPUT
Inf operand
QNaN operand
Alpha Instruction Set
A–16
21264/EV67 Hardware
Supplied Result
±Inf
QNaN
QNaN
CQNaN
QNaN
QNaN
CQNaN
±Inf
±0
±Inf
+Inf
QNaN
QNaN
CQNaN
-0
root
True or False
False for EQ, True for UN
False for EQ,True for UN
True or False
False
False
0
0
Alpha 21264/EV67 Hardware Reference Manual
Exception
(none)
(none)
Invalid Op
Invalid Op
(none)
Invalid Op
Invalid Op
Div Zero
(none)
(none)
(none)
(none)
Invalid Op
Invalid Op
(none)
Inexact
(none)
(none)
Invalid Op
(none)
Invalid Op
Invalid Op
Invalid Op
Invalid Op