Input Differential Amplifier Clock Receiver (I_Da_Clk); Input Differential Amplifier Receiver (I_Da); Input Dc Reference Pin (I_Dc_Ref); Vdd (I_Dc_Power) - Compaq 21264 Hardware Reference Manual

Note:
Table 9–3 VDD (I_DC_POWER)
Parameter Symbol Description
VDD Processor core supply voltage
Power (sleep) Processor power required (sleep)
PLL_VDD PLL supply voltage
PLL_IDD PLL supply current (running)
1
Power measured at 37.5 MHz while running the "Ebox aliveness test."
Table 9–4 Input DC Reference Pin (I_DC_REF)
Parameter
Symbol Description
VREF DC input reference voltage
| I | Input current
I
Table 9–5 Input Differential Amplifier Receiver (I_DA)
Parameter
Symbol Description
V Low-level input voltage
IL
V High-level input voltage
IH
| I | Input current
I
C Input-pin capacitance
IN
Table 9–6 Input Differential Amplifier Clock Receiver (I_DA_CLK)
Parameter
Symbol Description
V Differential input voltage
diff
| V | Open-circuit differential
BIAS
| I | Input current
I
C Input-pin capacitance
IN
Alpha 21264/EV67 Hardware Reference Manual
Current out of a 21264/EV67 pin is represented by a – symbol while a +
symbol indicates current flowing into a 21264/EV67 pin.
Test Conditions
—
VSS
Test Conditions Minimum
Note 5
—
VSS
Freq =10 MHz
Test Conditions
—
I
Note 2
VSS
Freq =10 MHz
DC Characteristics
Test Conditions Minimum Maximum
— 1.9 V
@ VDD = 2.1 V —
Note 3
— 3.135 V
Freq = 600 MHz —
Minimum
600 mV
V VDD —
—
VREF + 200 mV —
V VDD —
—
Minimum
200 mv Note 1
A —
V VDD —
—
2.15 V
1
19 W
3.465 Vc
25 mA
Maximum
VDD – 650 mV
150 A
Maximum
VREF – 200 mV
150 A
5.7 pF
Note 6
Maximum
—
50 mV
150 A
5.0 pF
Note 6
Electrical Data
9–3