Interrupt Summary Register - Isum; Software Interrupt Request Register; Interrupt Summary Register; Software Interrupt Request Register Fields Description - Compaq 21264 Hardware Reference Manual

Figure 5–17 Software Interrupt Request Register
63
SIR[15:1]
Table 5–6 describes the software interrupt request register fields.
Table 5–6 Software Interrupt Request Register Fields Description
Name
Reserved
SIR[15:1]
Reserved
5.2.11 Interrupt Summary Register – ISUM
The interrupt summary register (ISUM) is a read-only register that records all pending
hardware, software, and AST interrupt requests that have their corresponding enable bit
set.
If a new interrupt (hardware, serial line, crd, or performance counters) occurs simulta-
neously with an ISUM read, the ISUM read returns zeros. That condition is normally
assumed to be a passive release condition. The interrupt is signaled again when the
PALcode returns to native mode. The effects of this condition can be minimized by
reading ISUM twice and ORing the results.
Usage of ISUM in performance monitoring is described in Section 6.10. Figure 5–18
shows the interrupt summary register.
Figure 5–18 Interrupt Summary Register
63
EI[5:0]
SL
CR
PC[1:0]
SI[15:1]
ASTU
ASTS
ASTE
ASTK
Alpha 21264/EV67 Hardware Reference Manual
Extent Type Description
[63:29] — —
[28:14] RW Software Interrupt Requests
[13:0] — —
39 38 33 32 31
29 28
30 29 28 14
Internal Processor Registers
Ibox IPRs
14 13 0
LK99-0023A
13 11 10 9 8 5 4 3 2 0
LK99-0024A
5–11