Bcache Victim Read During An Ecb Instruction; Memory/System Port Single-Bit Data Correctable Ecc Error; Icache Fill From Memory; Dcache Fill From Memory - Compaq 21264 Hardware Reference Manual

Compaq microprocessor reference manual
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The Bcache access error is written out to memory and is subsequently detected and cor-
rected by the next consumer of the data.
No correction is made.
No status is logged (C_STAT = 0).
A CRD error interrupt is posted, when enabled.

8.8.3.2 Bcache Victim Read During an ECB Instruction

A victim from the Bcache that occurs while an ECB instruction is being executed is
written directly to the system port without correction. No Cbox registers are set and no
exception is taken.

8.9 Memory/System Port Single-Bit Data Correctable ECC Error

The following actions may cause memory/system port data ECC errors:
Icache fill–data possibly used by Icache
Dcache fill–data possibly used by a load instruction
The recovery mechanism depends on the event that caused the error.

8.9.1 Icache Fill from Memory

For an Icache fill the LSD ECC generators detect the error, and bad Icache data
parity is generated for the octaword that contains the quadword in error.
The hardware flushes the Icache.
C_STAT[ISTREAM_MEM_ERR] is set.
C_ADDR contains bits [42:6] of the system memory fill address of the block that
contains the error.
C_SYNDROME_0[7:0] and C_SYNDROME_1[7:0] contain the syndrome of
quadword 0 and 1, respectively, of the octaword subblock that contains the error.
A machine check (MCHK) is posted and taken immediately. The PALcode machine
check handler performs a scrubbing operation as described in Section D.36 to
ensure that the origination point of the error is corrected.
Note:

8.9.2 Dcache Fill from Memory

If the quadword in error is not used to satisfy a load instruction, no hardware
recovery flow is invoked. The quadword in error, and its associated check bits, are writ-
ten into the Dcache. However, status is logged as shown in the bulleted list below and a
corrected read data (CRD) error interrupt is posted, when enabled. PALcode may
choose to correct the error by scrubbing the block. If the error is not corrected by PAL-
code at the time, the error will be detected and corrected by a load/victim operation.
Alpha 21264/EV67 Hardware Reference Manual
Memory/System Port Single-Bit Data Correctable ECC Error
Also, a corrected read data (CRD) error is posted, when enabled, in case
this error is in a speculative path and the MCHK is removed. The CRD
error PALcode reads the status to detect this condition and scrubs the block.
In the normal MCHK flow, the PALcode clears the pending CRD error.
Error Detection and Error Handling
8–7

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