Store Instruction (Quadword Or Smaller); Dcache Victim Extracts; Dcache Store Second Error; Dcache Duplicate Tag Parity Error - Compaq 21264 Hardware Reference Manual

Dcache Store Second Error

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Note:

8.4.2 Store Instruction (Quadword or Smaller)

A store instruction that is a quadword or smaller could invoke a Dcache ECC error,
since the original quadword must be read to calculate the new check bits.
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The Mbox scrubs the original quadword and replays the write transaction.
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DC_STAT[ECC_ERR_ST] is set.
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A corrected read data (CRD) error interrupt is posted, when enabled.

8.4.3 Dcache Victim Extracts

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Dcache victims with an ECC error are scrubbed as they are written into the
victim data buffer.
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No status is logged.
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No exception is posted.
8.5 Dcache Store Second Error
A second store instruction error is logged when it occurs close behind the first.
Neither error is corrected.
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DC_STAT[ECC_ERR_ST] is set.
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DC_STAT[SEO] is set.
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When enabled, a machine check (MCHK) is posted. The MCHK is taken when not
in PALmode.

8.6 Dcache Duplicate Tag Parity Error

The Dcache duplicate tag has the correct version of the Dcache coherence state for the
21264/EV67, allowing it to be used for correct tag/status data when the Dcache tags
generate a parity error. These tags are parity protected also; however, the Dcache dupli-
cate tag cell is designed to be much more tolerant of soft errors. The parity generators
for the duplicate tags are enabled whenever the Cbox performs a physically-indexed
read transaction of eight locations in the tag array. If an error is generated, the following
actions are taken:
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Dcache duplicate tag parity errors are not recoverable.
Error Detection and Error Handling
8–4
C_ADDR contains bits [19:6] of the Dcache address of the block that contains
the error (bits [42:20] of the physical address are not updated).
DC_STAT[ECC_ERR_LD] is set.
The load queue retries the load and rewrites the register.
A corrected read data (CRD) error interrupt is posted, when enabled.
Errors in speculative load instructions cause a CRD error interrupt
to be posted but the data is not scrubbed by hardware. The PALcode
cannot perform a scrub because C_STAT is zero and C_ADDR does not
contain the address of the error.
Alpha 21264/EV67 Hardware Reference Manual